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The patch adds support to load a Lattice's bitstream image (called VME file) into a Lattice FPGA. The code containing the state machine delivered as part of Lattice's ispVMtools is integrated. The FPGA is programmed using the JTAG interface. The board maintainer must provide accessors to drive the JTAG signals TCK, TMS, TDI and to get the value of the input signal TDO. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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.. | ||
ACEX1K.c | ||
altera.c | ||
cyclon2.c | ||
fpga.c | ||
ivm_core.c | ||
lattice.c | ||
Makefile | ||
spartan2.c | ||
spartan3.c | ||
stratixII.c | ||
virtex2.c | ||
xilinx.c |