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be0724601a
Add STM32MP257F-EV1 board -----BEGIN PGP SIGNATURE----- iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmVR87YcHHBhdHJpY2Uu Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/ph+cD/0YFWkURt5TASxw49MB EE8PHjuWFPRVhR/lBX0vUxJRfltbmbJOKeGSZZeRW7LGApDVKVxKdrk2gGeLekJk L4i5KHBCDts35v3xfFhfxBYMYgXN7KiCo5Cv49b6ibxNeAUt/zKM1+CmLQWW+O8J 60LhATQduTHE9/QYiZYJusO4ma+HOSlCgbE+4jwj19Y3DaridBZ0/P+yVarjB6Mo j/cpGkQ9YQekx0gD6OJjd13kU8LJ5/qaKpMhLhU5HwnxvSuosy1JX8r9gNA2x5yt EqscRJBnQE2pKCIekzETX347Es/vhcYM6YFIGyY40bDT83on2cgxFm4xKAZ4RdNb uT4G24AueIiyT3Rpd4vGv9cWuSksSiSxcAa4ouMGAxnNyDwJaJ7HYGqnQ4yA8doR VbtwK1bT6LutgMn7ymFAiDEYaeplhF4ybxvXZJT9/qjeMXfwhBGF9UYqQNDUCDah 8ljbA0jIIV1SIVgYL4jPCwby9D53GGVtQ06SVXiJRhHgVJnkQaojByYU7xS8xrqS 1j1Ccy9rmpixS4pt589Q1dKoPGiUVgh9Z58PpR9yrCWzIokIL0WTMttG0PkSUJYJ VpNuQbsKK3LZ01xbhVpZWauOoKTfK2Fe6XsF04WCP+cK8rM+uV6DeE+bqhnadj/M CHJscGOKvhIR3jkF10F5mMJ1RA== =E2zX -----END PGP SIGNATURE----- Merge tag 'u-boot-stm32-20231113' of https://source.denx.de/u-boot/custodians/u-boot-stm into next Introduce STM32MP2 SoCs family support Add STM32MP257F-EV1 board [trini: Adjust some includes] Signed-off-by: Tom Rini <trini@konsulko.com>
107 lines
2.2 KiB
C
107 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
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/*
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* Copyright (C) 2023, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY LOGC_ARCH
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#include <clk.h>
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#include <cpu_func.h>
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#include <debug_uart.h>
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#include <env_internal.h>
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#include <init.h>
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#include <misc.h>
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#include <wdt.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/system.h>
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#include <dm/device.h>
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#include <dm/lists.h>
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#include <dm/uclass.h>
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/*
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* early TLB into the .data section so that it not get cleared
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* with 16kB alignment
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*/
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#define EARLY_TLB_SIZE 0xA000
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u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000);
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/*
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* initialize the MMU and activate cache in U-Boot pre-reloc stage
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* MMU/TLB is updated in enable_caches() for U-Boot after relocation
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*/
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static void early_enable_caches(void)
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{
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if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
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return;
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if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) {
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gd->arch.tlb_size = EARLY_TLB_SIZE;
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gd->arch.tlb_addr = (unsigned long)&early_tlb;
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}
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/* enable MMU (default configuration) */
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dcache_enable();
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}
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/*
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* Early system init
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*/
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int arch_cpu_init(void)
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{
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icache_enable();
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early_enable_caches();
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return 0;
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}
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void enable_caches(void)
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{
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/* deactivate the data cache, early enabled in arch_cpu_init() */
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dcache_disable();
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/*
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* Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr
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* to update the TLB location udpated in board_f.c::reserve_mmu
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*/
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gd->arch.tlb_fillptr = 0;
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dcache_enable();
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}
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/* used when CONFIG_DISPLAY_CPUINFO is activated */
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int print_cpuinfo(void)
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{
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char name[SOC_NAME_SIZE];
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get_soc_name(name);
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printf("CPU: %s\n", name);
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return 0;
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}
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int arch_misc_init(void)
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{
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return 0;
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}
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/*
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* Force data-section, as .bss will not be valid
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* when save_boot_params is invoked.
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*/
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static uintptr_t nt_fw_dtb __section(".data");
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uintptr_t get_stm32mp_bl2_dtb(void)
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{
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return nt_fw_dtb;
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}
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/*
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* Save the FDT address provided by TF-A in r2 at boot time
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* This function is called from start.S
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*/
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void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
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unsigned long r3)
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{
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nt_fw_dtb = r2;
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save_boot_params_ret();
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}
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