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ffda1089dd
This makes it clear these are only to be used by the R5 builds of SPL. And this will be used to later more cleanly split the two builds. Signed-off-by: Andrew Davis <afd@ti.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* am62a Quality of Service (QoS) Configuration Data
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* Auto generated from K3 Resource Partitioning tool
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*
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* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include <asm/arch/hardware.h>
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#include "common.h"
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struct k3_qos_data am62a_qos_data[] = {
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/* modules_qosConfig0 - 1 endpoints, 4 channels */
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 0,
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.val = ORDERID_8,
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},
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 1,
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.val = ORDERID_8,
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},
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 2,
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.val = ORDERID_8,
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},
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0x100 + 0x4 * 3,
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.val = ORDERID_8,
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},
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/* Following registers set 1:1 mapping for orderID MAP1/MAP2
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* remap registers. orderID x is remapped to orderID x again
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* This is to ensure orderID from MAP register is unchanged
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*/
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/* K3_DSS_UL_MAIN_0_VBUSM_DMA - 1 groups */
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 0,
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.val = 0x76543210,
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},
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{
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.reg = K3_DSS_UL_MAIN_0_VBUSM_DMA + 4,
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.val = 0xfedcba98,
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},
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};
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uint32_t am62a_qos_count = sizeof(am62a_qos_data) / sizeof(am62a_qos_data[0]);
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