mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
cfa34996b0
Fastboot need a bunch of options to be operating properly, such as the g_dnl gadget, the fastboot command, and some options that make sense. Since fastboot is now part of Kconfig, make sure we have them right. That will also reduce the boilerplate in the defconfigs. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
91 lines
2.3 KiB
Text
91 lines
2.3 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3288=y
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# CONFIG_SPL_MMC_SUPPORT is not set
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CONFIG_TARGET_CHROMEBOOK_MINNIE=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
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CONFIG_DEBUG_UART=y
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_SILENT_CONSOLE=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=0
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_PARTITION_UUIDS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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# CONFIG_SPL_SIMPLE_BUS is not set
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_I2C_MUX=y
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CONFIG_DM_KEYBOARD=y
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CONFIG_CROS_EC_KEYB=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_SPI=y
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CONFIG_PWRSEQ=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINCTRL_FULL is not set
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CONFIG_PINCTRL_ROCKCHIP_RK3288=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_RK8XX=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_ROCKCHIP_SERIAL=y
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
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CONFIG_USB_GADGET_VENDOR_NUM=0x2207
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CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_DM_VIDEO=y
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_DISPLAY_ROCKCHIP_EDP=y
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CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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CONFIG_CONSOLE_SCROLL_LINES=10
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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# CONFIG_SPL_OF_LIBFDT is not set
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