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https://github.com/AsahiLinux/u-boot
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664258887d
Add a PHY driver for the R-Car Gen2 which allows configuring the mux connected to the EHCI controllers and USBHS controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
190 lines
4.3 KiB
C
190 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RCar Gen2 USB PHY driver
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*
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include <common.h>
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#include <clk.h>
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#include <div64.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <generic-phy.h>
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#include <reset.h>
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#include <syscon.h>
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#include <usb.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <power/regulator.h>
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#define USBHS_LPSTS 0x02
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#define USBHS_UGCTRL 0x80
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#define USBHS_UGCTRL2 0x84
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#define USBHS_UGSTS 0x88 /* From technical update */
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/* Low Power Status register (LPSTS) */
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#define USBHS_LPSTS_SUSPM 0x4000
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/* USB General control register (UGCTRL) */
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#define USBHS_UGCTRL_CONNECT BIT(2)
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#define USBHS_UGCTRL_PLLRESET BIT(0)
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/* USB General control register 2 (UGCTRL2) */
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#define USBHS_UGCTRL2_USB2SEL 0x80000000
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#define USBHS_UGCTRL2_USB2SEL_PCI 0x00000000
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#define USBHS_UGCTRL2_USB2SEL_USB30 0x80000000
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#define USBHS_UGCTRL2_USB0SEL 0x00000030
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#define USBHS_UGCTRL2_USB0SEL_PCI 0x00000010
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#define USBHS_UGCTRL2_USB0SEL_HS_USB 0x00000030
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/* USB General status register (UGSTS) */
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#define USBHS_UGSTS_LOCK 0x00000100 /* From technical update */
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#define PHYS_PER_CHANNEL 2
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struct rcar_gen2_phy {
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fdt_addr_t regs;
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struct clk clk;
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};
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static int rcar_gen2_phy_phy_init(struct phy *phy)
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{
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struct rcar_gen2_phy *priv = dev_get_priv(phy->dev);
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u16 chan = phy->id & 0xffff;
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u16 mode = (phy->id >> 16) & 0xffff;
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u32 clrmask, setmask;
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if (chan == 0) {
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clrmask = USBHS_UGCTRL2_USB0SEL;
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setmask = mode ? USBHS_UGCTRL2_USB0SEL_HS_USB :
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USBHS_UGCTRL2_USB0SEL_PCI;
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} else {
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clrmask = USBHS_UGCTRL2_USB2SEL;
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setmask = mode ? USBHS_UGCTRL2_USB2SEL_USB30 :
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USBHS_UGCTRL2_USB2SEL_PCI;
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}
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clrsetbits_le32(priv->regs + USBHS_UGCTRL2, clrmask, setmask);
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return 0;
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}
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static int rcar_gen2_phy_phy_power_on(struct phy *phy)
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{
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struct rcar_gen2_phy *priv = dev_get_priv(phy->dev);
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int i;
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u32 value;
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/* Power on USBHS PHY */
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clrbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_PLLRESET);
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setbits_le16(priv->regs + USBHS_LPSTS, USBHS_LPSTS_SUSPM);
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for (i = 0; i < 20; i++) {
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value = readl(priv->regs + USBHS_UGSTS);
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if ((value & USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) {
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setbits_le32(priv->regs + USBHS_UGCTRL,
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USBHS_UGCTRL_CONNECT);
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return 0;
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}
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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static int rcar_gen2_phy_phy_power_off(struct phy *phy)
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{
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struct rcar_gen2_phy *priv = dev_get_priv(phy->dev);
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/* Power off USBHS PHY */
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clrbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_CONNECT);
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clrbits_le16(priv->regs + USBHS_LPSTS, USBHS_LPSTS_SUSPM);
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setbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_PLLRESET);
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return 0;
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}
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static int rcar_gen2_phy_of_xlate(struct phy *phy,
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struct ofnode_phandle_args *args)
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{
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if (args->args_count != 2) {
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dev_err(phy->dev, "Invalid DT PHY argument count: %d\n",
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args->args_count);
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return -EINVAL;
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}
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if (args->args[0] != 0 && args->args[0] != 2) {
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dev_err(phy->dev, "Invalid DT PHY channel: %d\n",
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args->args[0]);
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return -EINVAL;
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}
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if (args->args[1] != 0 && args->args[1] != 1) {
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dev_err(phy->dev, "Invalid DT PHY mode: %d\n",
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args->args[1]);
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return -EINVAL;
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}
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if (args->args_count)
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phy->id = args->args[0] | (args->args[1] << 16);
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else
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phy->id = 0;
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return 0;
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}
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static const struct phy_ops rcar_gen2_phy_phy_ops = {
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.init = rcar_gen2_phy_phy_init,
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.power_on = rcar_gen2_phy_phy_power_on,
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.power_off = rcar_gen2_phy_phy_power_off,
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.of_xlate = rcar_gen2_phy_of_xlate,
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};
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static int rcar_gen2_phy_probe(struct udevice *dev)
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{
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struct rcar_gen2_phy *priv = dev_get_priv(dev);
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int ret;
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priv->regs = dev_read_addr(dev);
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if (priv->regs == FDT_ADDR_T_NONE)
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return -EINVAL;
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/* Enable clock */
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ret = clk_get_by_index(dev, 0, &priv->clk);
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if (ret)
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return ret;
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ret = clk_enable(&priv->clk);
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if (ret)
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return ret;
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return 0;
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}
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static int rcar_gen2_phy_remove(struct udevice *dev)
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{
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struct rcar_gen2_phy *priv = dev_get_priv(dev);
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clk_disable(&priv->clk);
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clk_free(&priv->clk);
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return 0;
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}
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static const struct udevice_id rcar_gen2_phy_of_match[] = {
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{ .compatible = "renesas,rcar-gen2-usb-phy", },
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{ },
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};
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U_BOOT_DRIVER(rcar_gen2_phy) = {
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.name = "rcar-gen2-phy",
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.id = UCLASS_PHY,
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.of_match = rcar_gen2_phy_of_match,
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.ops = &rcar_gen2_phy_phy_ops,
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.probe = rcar_gen2_phy_probe,
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.remove = rcar_gen2_phy_remove,
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.priv_auto_alloc_size = sizeof(struct rcar_gen2_phy),
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};
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