mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
50b1a69cee
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them. Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com>
112 lines
1.1 KiB
Text
112 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2019 NXP
|
|
*/
|
|
|
|
/ {
|
|
wdt-reboot {
|
|
compatible = "wdt-reboot";
|
|
wdt = <&wdog1>;
|
|
u-boot,dm-spl;
|
|
};
|
|
};
|
|
|
|
&{/soc@0} {
|
|
u-boot,dm-pre-reloc;
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&clk {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&osc_24m {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&aips1 {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&aips2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&aips3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&iomuxc {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_reg_usdhc2_vmmc {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
®_usdhc2_vmmc {
|
|
u-boot,off-on-delay-us = <20000>;
|
|
};
|
|
|
|
&pinctrl_uart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc2_gpio {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio4 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio5 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&uart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc2 {
|
|
u-boot,dm-spl;
|
|
sd-uhs-sdr104;
|
|
sd-uhs-ddr50;
|
|
};
|
|
|
|
&usdhc3 {
|
|
u-boot,dm-spl;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
};
|
|
|
|
&wdog1 {
|
|
u-boot,dm-spl;
|
|
};
|