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https://github.com/AsahiLinux/u-boot
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85da558762
Commit f11513d997 ("net: phy: realtek: Add tx/rx delay config for
8211e") made the Realtek PHY driver honour the phy-mode DT property,
to set up the proper delay scheme for the RX and TX lines. A similar
change in the kernel revealed that those properties were mostly wrong.
The kernel DTs got updated over the last few months, but we were missing
out on the U-Boot version.
Just sync in the phy-mode properties from the mainline kernel,
v5.17-rc7, to avoid the breaking DT sync that late in the cycle.
This fixes Ethernet operation on the affected boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
206 lines
3.3 KiB
Text
206 lines
3.3 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
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// Based on sun50i-a64-pine64.dts, which is:
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// Copyright (c) 2016 ARM Ltd.
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/dts-v1/;
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#include "sun50i-a64-sopine.dtsi"
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/ {
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model = "SoPine with baseboard";
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compatible = "pine64,sopine-baseboard", "pine64,sopine",
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"allwinner,sun50i-a64";
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aliases {
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ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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hdmi-connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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reg_vcc1v8: vcc1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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&ac_power_supply {
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status = "okay";
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};
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&battery_power_supply {
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status = "okay";
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};
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&codec {
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status = "okay";
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};
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&codec_analog {
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status = "okay";
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};
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&dai {
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status = "okay";
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};
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&de {
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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phy-mode = "rgmii-txid";
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phy-handle = <&ext_rgmii_phy>;
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phy-supply = <®_dc1sw>;
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status = "okay";
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};
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&hdmi {
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hvcc-supply = <®_dldo1>;
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status = "okay";
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&mdio {
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <®_dcdc1>;
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vqmmc-supply = <®_vcc1v8>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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mmc-hs200-1_8v;
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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®_dc1sw {
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/*
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* Ethernet PHY needs 30ms to properly power up and some more
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* to initialize. 100ms should be plenty of time to finish
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* whole process.
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*/
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regulator-enable-ramp-delay = <100000>;
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regulator-name = "vcc-phy";
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};
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®_dldo1 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-hdmi";
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};
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®_dldo2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-mipi";
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};
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®_dldo4 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi";
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};
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&simplefb_hdmi {
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vcc-hdmi-supply = <®_dldo1>;
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};
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&sound {
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simple-audio-card,aux-devs = <&codec_analog>;
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simple-audio-card,widgets = "Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Left DAC", "DACL",
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"Right DAC", "DACR",
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"Headphone Jack", "HP",
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"ADCL", "Left ADC",
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"ADCR", "Right ADC",
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"MIC2", "Microphone Jack";
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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/* On Pi-2 connector */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "disabled";
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};
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/* On Euler connector */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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status = "disabled";
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};
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/* On Euler connector, RTS/CTS optional */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins>;
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status = "disabled";
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};
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&usb_otg {
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dr_mode = "host";
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status = "okay";
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};
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&usbphy {
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status = "okay";
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};
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