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u-boot/arch/powerpc/cpu/mpc8xxx/ddr
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york 5800e7ab32 powerpc/8xxx: Enable quad-rank DIMMs. 
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
..
common_timing_params.h Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
ctrl_regs.c powerpc/8xxx: Enable quad-rank DIMMs. 2010-07-26 13:16:09 -05:00
ddr.h powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 2010-07-26 13:16:09 -05:00
ddr1_dimm_params.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
ddr2_dimm_params.c Enabled support for Rev 1.3 SPD for DDR2 DIMMs 2010-05-12 04:54:30 -05:00
ddr3_dimm_params.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
lc_common_dimm_params.c powerpc/8xxx: Enable quad-rank DIMMs. 2010-07-26 13:16:09 -05:00
main.c powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 2010-07-26 13:16:09 -05:00
Makefile Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
options.c powerpc/8xxx: Enable quad-rank DIMMs. 2010-07-26 13:16:09 -05:00
util.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00