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68b08c4077
Bring in the current device tree files for rock2 from linux/next commit 719d6c1. Hopefully this is the latest one. Signed-off-by: Simon Glass <sjg@chromium.org>
278 lines
6.8 KiB
Text
278 lines
6.8 KiB
Text
/*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/pwm/pwm.h>
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#include "rk3288.dtsi"
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/ {
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memory {
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reg = <0x0 0x80000000>;
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device_type = "memory";
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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pinctrl-0 = <&emmc_reset>;
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pinctrl-names = "default";
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reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
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};
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ext_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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};
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vcc_sys: vsys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&cpu0 {
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cpu0-supply = <&vdd_cpu>;
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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disable-wp;
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non-removable;
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num-slots = <1>;
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mmc-pwrseq = <&emmc_pwrseq>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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vmmc-supply = <&vcc_io>;
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status = "okay";
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};
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&gmac {
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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clock_in_out = "input";
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phy-mode = "rgmii";
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phy-supply = <&vccio_pmu>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins &phy_rst>;
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snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 30000>;
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rx_delay = <0x10>;
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tx_delay = <0x30>;
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};
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&i2c0 {
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status = "okay";
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act8846: act8846@5a {
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compatible = "active-semi,act8846";
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reg = <0x5a>;
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system-power-controller;
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inl1-supply = <&vcc_io>;
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inl2-supply = <&vcc_sys>;
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inl3-supply = <&vcc_20>;
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vp1-supply = <&vcc_sys>;
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vp2-supply = <&vcc_sys>;
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vp3-supply = <&vcc_sys>;
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vp4-supply = <&vcc_sys>;
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regulators {
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vcc_ddr: REG1 {
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regulator-name = "VCC_DDR";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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vcc_io: REG2 {
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regulator-name = "VCC_IO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_log: REG3 {
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regulator-name = "VDD_LOG";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcc_20: REG4 {
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regulator-name = "VCC_20";
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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regulator-always-on;
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};
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vccio_sd: REG5 {
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regulator-name = "VCCIO_SD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd10_lcd: REG6 {
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regulator-name = "VDD10_LCD";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcca_codec: REG7 {
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regulator-name = "VCCA_CODEC";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vcca_tp: REG8 {
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regulator-name = "VCCA_TP";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccio_pmu: REG9 {
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regulator-name = "VCCIO_PMU";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_10: REG10 {
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regulator-name = "VDD_10";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcc_18: REG11 {
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regulator-name = "VCC_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vcc18_lcd: REG12 {
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regulator-name = "VCC18_LCD";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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};
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vdd_cpu: syr827@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-boot-on;
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regulator-enable-ramp-delay = <300>;
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <8000>;
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vin-supply = <&vcc_sys>;
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};
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vdd_gpu: syr828@41 {
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compatible = "silergy,syr828";
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reg = <0x41>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-enable-ramp-delay = <300>;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-name = "vdd_gpu";
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regulator-ramp-delay = <8000>;
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vin-supply = <&vcc_sys>;
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};
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};
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&pinctrl {
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pcfg_output_high: pcfg-output-high {
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output-high;
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};
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emmc {
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emmc_reset: emmc-reset {
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rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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gmac {
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phy_rst: phy-rst {
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rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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};
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&tsadc {
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rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
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rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
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status = "okay";
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};
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&vopb {
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status = "okay";
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};
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&vopb_mmu {
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status = "okay";
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};
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&vopl {
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status = "okay";
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};
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&vopl_mmu {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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