mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 00:47:26 +00:00
098c063765
This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
250 lines
4.2 KiB
Text
250 lines
4.2 KiB
Text
/*
|
|
* Copyright (C) 2018 MediaTek Inc.
|
|
* Author: Ryder Lee <ryder.lee@mediatek.com>
|
|
*
|
|
* SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "mt7623.dtsi"
|
|
#include "mt7623-u-boot.dtsi"
|
|
|
|
/ {
|
|
model = "Bananapi BPI-R2";
|
|
compatible = "bananapi,bpi-r2", "mediatek,mt7623";
|
|
|
|
chosen {
|
|
stdout-path = &uart2;
|
|
tick-timer = &timer0;
|
|
};
|
|
|
|
reg_1p8v: regulator-1p8v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_3p3v: regulator-3p3v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_5v: regulator-5v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-5V";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
blue {
|
|
label = "bpi-r2:pio:blue";
|
|
gpios = <&gpio 241 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
green {
|
|
label = "bpi-r2:pio:green";
|
|
gpios = <&gpio 240 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
red {
|
|
label = "bpi-r2:pio:red";
|
|
gpios = <&gpio 239 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
};
|
|
};
|
|
|
|
ð {
|
|
status = "okay";
|
|
mediatek,gmac-id = <0>;
|
|
phy-mode = "rgmii";
|
|
mediatek,switch = "mt7530";
|
|
reset-gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
|
|
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
|
|
&mmc0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc0_pins_default>;
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
max-frequency = <50000000>;
|
|
cap-mmc-highspeed;
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_1p8v>;
|
|
non-removable;
|
|
};
|
|
|
|
&mmc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
status = "okay";
|
|
bus-width = <4>;
|
|
max-frequency = <50000000>;
|
|
cap-sd-highspeed;
|
|
cd-gpios = <&gpio 261 GPIO_ACTIVE_LOW>;
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_3p3v>;
|
|
};
|
|
|
|
&pinctrl {
|
|
ephy_default: ephy_default {
|
|
mux {
|
|
function = "eth";
|
|
groups = "mdc_mdio", "ephy";
|
|
};
|
|
|
|
conf {
|
|
pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
|
|
"G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
|
|
"G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
|
|
"MDC", "MDIO";
|
|
drive-strength = <12>;
|
|
mediatek,tdsel = <5>;
|
|
};
|
|
};
|
|
|
|
mmc0_pins_default: mmc0default {
|
|
mux {
|
|
function = "msdc";
|
|
groups = "msdc0";
|
|
};
|
|
|
|
conf-cmd-data {
|
|
pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
|
|
"MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
|
|
"MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
|
|
conf-clk {
|
|
pins = "MSDC0_CLK";
|
|
bias-pull-down;
|
|
};
|
|
|
|
conf-rst {
|
|
pins = "MSDC0_RSTB";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
mmc1_pins_default: mmc1default {
|
|
mux {
|
|
function = "msdc";
|
|
groups = "msdc1", "msdc1_wp_0";
|
|
};
|
|
|
|
conf-cmd-data {
|
|
pins = "MSDC1_DAT0", "MSDC1_DAT1", "MSDC1_DAT2",
|
|
"MSDC1_DAT3", "MSDC1_DAT3", "MSDC1_CMD";
|
|
input-enable;
|
|
drive-strength = <4>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
conf-clk {
|
|
pins = "MSDC1_CLK";
|
|
drive-strength = <4>;
|
|
};
|
|
|
|
conf-wp {
|
|
pins = "EINT7";
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie_default: pcie-default {
|
|
mux {
|
|
function = "pcie";
|
|
groups = "pcie0_0_perst", "pcie1_0_perst";
|
|
};
|
|
};
|
|
|
|
uart0_pins_a: uart0-default {
|
|
mux {
|
|
function = "uart";
|
|
groups = "uart0_0_txd_rxd";
|
|
};
|
|
};
|
|
|
|
uart1_pins_a: uart1-default {
|
|
mux {
|
|
function = "uart";
|
|
groups = "uart1_0_txd_rxd";
|
|
};
|
|
};
|
|
|
|
uart2_pins_a: uart2-default {
|
|
mux {
|
|
function = "uart";
|
|
groups = "uart2_0_txd_rxd";
|
|
};
|
|
};
|
|
|
|
uart2_pins_b: uart2-alt {
|
|
mux {
|
|
function = "uart";
|
|
groups = "uart2_1_txd_rxd";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie_default>;
|
|
status = "okay";
|
|
|
|
pcie@0,0 {
|
|
status = "okay";
|
|
};
|
|
|
|
pcie@1,0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&pcie0_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie1_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins_a>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_pins_a>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart2_pins_a>;
|
|
status = "okay";
|
|
};
|