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ede6e7b64f
This adds code to take peripherals out of reset based on an environment variable. This is in preparation for removing the code that does this from SPL. However, some drivers even in current Linux cannot handle peripheral reset, so until this works, we need a compatibility workaround. This workaround is implemented in the 'assert' and 'remove' callbacks of this reset driver: the 'assert' callback does not disable peripherals that were already taken out of reset, while the 'remove' callback, which is called on OS_PREPARE, deasserts all peripheral resets if the environment variable "socfpga_legacy_reset_compat" is set to 1, which is what the gen5 SPL did up to now. This is in preparation to clean up the SPL and implementing proper reset handling for U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Socfpga Reset Controller Driver
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*
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* Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
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*
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* based on
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* Allwinner SoCs Reset Controller driver
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*
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* Copyright 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/of_access.h>
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#include <reset-uclass.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#define BANK_INCREMENT 4
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#define NR_BANKS 8
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struct socfpga_reset_data {
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void __iomem *modrst_base;
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};
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/*
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* For compatibility with Kernels that don't support peripheral reset, this
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* driver can keep the old behaviour of not asserting peripheral reset before
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* starting the OS and deasserting all peripheral resets (enabling all
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* peripherals).
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*
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* For that, the reset driver checks the environment variable
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* "socfpga_legacy_reset_compat". If this variable is '1', perihperals are not
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* reset again once taken out of reset and all peripherals in 'permodrst' are
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* taken out of reset before booting into the OS.
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* Note that this should be required for gen5 systems only that are running
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* Linux kernels without proper peripheral reset support for all drivers used.
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*/
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static bool socfpga_reset_keep_enabled(void)
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{
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#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT)
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const char *env_str;
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long val;
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env_str = env_get("socfpga_legacy_reset_compat");
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if (env_str) {
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val = simple_strtol(env_str, NULL, 0);
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if (val == 1)
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return true;
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}
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#endif
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return false;
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}
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static int socfpga_reset_assert(struct reset_ctl *reset_ctl)
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{
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struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
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int id = reset_ctl->id;
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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setbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
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return 0;
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}
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static int socfpga_reset_deassert(struct reset_ctl *reset_ctl)
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{
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struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
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int id = reset_ctl->id;
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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clrbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
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return 0;
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}
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static int socfpga_reset_request(struct reset_ctl *reset_ctl)
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{
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debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
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reset_ctl, reset_ctl->dev, reset_ctl->id);
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return 0;
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}
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static int socfpga_reset_free(struct reset_ctl *reset_ctl)
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{
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debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
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reset_ctl->dev, reset_ctl->id);
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return 0;
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}
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static const struct reset_ops socfpga_reset_ops = {
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.request = socfpga_reset_request,
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.free = socfpga_reset_free,
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.rst_assert = socfpga_reset_assert,
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.rst_deassert = socfpga_reset_deassert,
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};
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static int socfpga_reset_probe(struct udevice *dev)
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{
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struct socfpga_reset_data *data = dev_get_priv(dev);
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const void *blob = gd->fdt_blob;
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int node = dev_of_offset(dev);
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u32 modrst_offset;
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void __iomem *membase;
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membase = devfdt_get_addr_ptr(dev);
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modrst_offset = fdtdec_get_int(blob, node, "altr,modrst-offset", 0x10);
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data->modrst_base = membase + modrst_offset;
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return 0;
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}
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static int socfpga_reset_remove(struct udevice *dev)
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{
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struct socfpga_reset_data *data = dev_get_priv(dev);
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if (socfpga_reset_keep_enabled()) {
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puts("Deasserting all peripheral resets\n");
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writel(0, data->modrst_base + 4);
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}
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return 0;
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}
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static const struct udevice_id socfpga_reset_match[] = {
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{ .compatible = "altr,rst-mgr" },
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{ /* sentinel */ },
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};
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U_BOOT_DRIVER(socfpga_reset) = {
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.name = "socfpga-reset",
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.id = UCLASS_RESET,
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.of_match = socfpga_reset_match,
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.probe = socfpga_reset_probe,
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.priv_auto_alloc_size = sizeof(struct socfpga_reset_data),
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.ops = &socfpga_reset_ops,
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.remove = socfpga_reset_remove,
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.flags = DM_FLAG_OS_PREPARE,
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};
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