mirror of
https://github.com/AsahiLinux/u-boot
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edf0acb3b4
Find the UCLASS_CACHE driver to configure the cache controller's settings. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
112 lines
2.1 KiB
C
112 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*/
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#include <common.h>
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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#include <netdev.h>
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#endif
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#include <linux/io.h>
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#include <faraday/ftsmc020.h>
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#include <fdtdec.h>
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#include <dm.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern phys_addr_t prior_stage_fdt_address;
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/*
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* Miscellaneous platform dependent initializations
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*/
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
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return 0;
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}
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int dram_init(void)
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{
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unsigned long sdram_base = PHYS_SDRAM_0;
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unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
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unsigned long actual_size;
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actual_size = get_ram_size((void *)sdram_base, expected_size);
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gd->ram_size = actual_size;
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if (expected_size != actual_size) {
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printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
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actual_size >> 20, expected_size >> 20);
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}
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
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gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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int board_eth_init(bd_t *bd)
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{
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return ftmac100_initialize(bd);
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}
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#endif
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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return 0;
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}
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void *board_fdt_blob_setup(void)
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{
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return (void *)CONFIG_SYS_FDT_BASE;
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}
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int smc_init(void)
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{
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int node = -1;
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const char *compat = "andestech,atfsmc020";
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void *blob = (void *)gd->fdt_blob;
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fdt_addr_t addr;
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struct ftsmc020_bank *regs;
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node = fdt_node_offset_by_compatible(blob, -1, compat);
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if (node < 0)
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return -FDT_ERR_NOTFOUND;
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addr = fdtdec_get_addr(blob, node, "reg");
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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regs = (struct ftsmc020_bank *)addr;
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regs->cr &= ~FTSMC020_BANK_WPROT;
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return 0;
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}
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static void v5l2_init(void)
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{
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struct udevice *dev;
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uclass_get_device(UCLASS_CACHE, 0, &dev);
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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smc_init();
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v5l2_init();
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return 0;
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}
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#endif
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