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https://github.com/AsahiLinux/u-boot
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882b7d726f
The duplication of the do_reset prototype has gotten out of hand, and they're not all in sync. Unify them all in command.h. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
253 lines
6.2 KiB
C
253 lines
6.2 KiB
C
/*
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* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Andreas Heppel <aheppel@sysgo.de>
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* (C) Copyright 2001 ELTEC Elektronik AG
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* Frank Gottschling <fgottschling@eltec.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <mpc106.h>
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#include <mk48t59.h>
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#include <74xx_7xx.h>
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#include <ns87308.h>
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#include <video_fb.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*---------------------------------------------------------------------------*/
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/*
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* Get Bus clock frequency
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*/
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ulong bab7xx_get_bus_freq (void)
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{
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/*
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* The GPIO Port 1 on BAB7xx reflects the bus speed.
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*/
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volatile struct GPIO *gpio =
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(struct GPIO *) (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_GPIO_BASE);
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unsigned char data = gpio->dta1;
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if (data & 0x02)
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return 66666666;
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return 83333333;
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}
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/*---------------------------------------------------------------------------*/
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/*
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* Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
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*/
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ulong bab7xx_get_gclk_freq (void)
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{
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static const int pllratio_to_factor[] = {
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00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
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00,
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};
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return pllratio_to_factor[get_hid1 () >> 28] *
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(bab7xx_get_bus_freq () / 10);
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}
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/*----------------------------------------------------------------------------*/
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int checkcpu (void)
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{
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uint pvr = get_pvr ();
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printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
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printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
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bab7xx_get_bus_freq () / 1000000);
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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int checkboard (void)
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{
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#ifdef CONFIG_SYS_ADDRESS_MAP_A
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puts ("Board: ELTEC BAB7xx PReP\n");
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#else
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puts ("Board: ELTEC BAB7xx CHRP\n");
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#endif
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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int checkflash (void)
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{
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/* TODO: XXX XXX XXX */
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printf ("2 MB ## Test not implemented yet ##\n");
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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static unsigned int mpc106_read_cfg_dword (unsigned int reg)
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{
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unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
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out32r (MPC106_REG_ADDR, reg_addr);
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return (in32r (MPC106_REG_DATA | (reg & 0x3)));
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}
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/* ------------------------------------------------------------------------- */
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long int dram_size (int board_type)
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{
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/* No actual initialisation to do - done when setting up
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* PICRs MCCRs ME/SARs etc in ram_init.S.
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*/
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register unsigned long i, msar1, mear1, memSize;
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#if defined(CONFIG_SYS_MEMTEST)
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register unsigned long reg;
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printf ("Testing DRAM\n");
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/* write each mem addr with it's address */
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for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4)
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*reg = reg;
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for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) {
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if (*reg != reg)
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return -1;
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}
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#endif
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/*
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* Since MPC106 memory controller chip has already been set to
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* control all memory, just read and interpret its memory boundery register.
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*/
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memSize = 0;
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msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
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mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
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i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
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do {
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if (i & 0x01) /* is bank enabled ? */
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memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
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msar1 >>= 8;
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mear1 >>= 8;
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i >>= 1;
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} while (i);
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return (memSize * 0x100000);
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}
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/* ------------------------------------------------------------------------- */
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phys_size_t initdram (int board_type)
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{
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return dram_size (board_type);
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}
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/* ------------------------------------------------------------------------- */
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void after_reloc (ulong dest_addr)
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{
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/*
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* Jump to the main U-Boot board init code
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*/
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board_init_r ((gd_t *) gd, dest_addr);
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}
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/* ------------------------------------------------------------------------- */
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/*
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* do_reset is done here because in this case it is board specific, since the
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* 7xx CPUs can only be reset by external HW (the RTC in this case).
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*/
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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#if defined(CONFIG_RTC_MK48T59)
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/* trigger watchdog immediately */
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rtc_set_watchdog (1, RTC_WD_RB_16TH);
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#else
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#error "You must define the macro CONFIG_RTC_MK48T59."
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#endif
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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#if defined(CONFIG_WATCHDOG)
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/*
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* Since the 7xx CPUs don't have an internal watchdog, this function is
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* board specific. We use the RTC here.
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*/
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void watchdog_reset (void)
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{
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#if defined(CONFIG_RTC_MK48T59)
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/* we use a 32 sec watchdog timer */
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rtc_set_watchdog (8, RTC_WD_RB_4);
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#else
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#error "You must define the macro CONFIG_RTC_MK48T59."
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#endif
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}
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#endif /* CONFIG_WATCHDOG */
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/* ------------------------------------------------------------------------- */
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#ifdef CONFIG_CONSOLE_EXTRA_INFO
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extern GraphicDevice smi;
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void video_get_info_str (int line_number, char *info)
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{
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/* init video info strings for graphic console */
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switch (line_number) {
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case 1:
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sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
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(get_pvr () >> 8) & 0xFF,
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get_pvr () & 0xFF,
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bab7xx_get_gclk_freq () / 1000000,
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bab7xx_get_bus_freq () / 1000000);
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return;
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case 2:
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sprintf (info,
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" ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
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dram_size (0) / 0x100000, flash_init () / 0x100000);
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return;
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case 3:
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sprintf (info, " %s", smi.modeIdent);
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return;
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}
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/* no more info lines */
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*info = 0;
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return;
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}
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#endif
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/*---------------------------------------------------------------------------*/
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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