mirror of
https://github.com/AsahiLinux/u-boot
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25e88d406e
The device tree source files of at91sam9x5ek board are copied from the Linux v4.10, do the changes below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
72 lines
2.4 KiB
Text
72 lines
2.4 KiB
Text
/*
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* at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
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* Image Sensor Interface.
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*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* Licensed under GPLv2.
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*/
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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ahb {
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apb {
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pinctrl@fffff400 {
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isi {
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pinctrl_isi_data_0_7: isi-0-data-0-7 {
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atmel,pins =
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<AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D0, conflicts with LCDDAT0 */
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AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D1, conflicts with LCDDAT1 */
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AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D2, conflicts with LCDDAT2 */
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AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D3, conflicts with LCDDAT3 */
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AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D4, conflicts with LCDDAT4 */
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AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D5, conflicts with LCDDAT5 */
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AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D6, conflicts with LCDDAT6 */
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AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D7, conflicts with LCDDAT7 */
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AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_PCK, conflicts with LCDDAT12 */
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AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_HSYNC, conflicts with LCDDAT14 */
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AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_VSYNC, conflicts with LCDDAT13 */
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};
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pinctrl_isi_data_8_9: isi-0-data-8-9 {
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atmel,pins =
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<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D8, conflicts with LCDDAT8 */
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AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with LCDDAT9 */
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};
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pinctrl_isi_data_10_11: isi-0-data-10-11 {
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atmel,pins =
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<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D10, conflicts with LCDDAT10 */
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AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with LCDDAT11 */
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};
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};
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};
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pmc: pmc@fffffc00 {
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periphck {
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isi_clk: isi_clk@25 {
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#clock-cells = <0>;
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reg = <25>;
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};
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};
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};
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isi: isi@f8048000 {
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compatible = "atmel,at91sam9g45-isi";
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reg = <0xf8048000 0x4000>;
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interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_isi_data_0_7>;
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clocks = <&isi_clk>;
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clock-names = "isi_clk";
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status = "disabled";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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};
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};
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