u-boot/include/configs/x530.h
Pali Rohár 29795302b9 arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz.
Use this information instead of manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 08:42:26 +02:00

98 lines
2.2 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018 Allied Telesis Labs
*/
#ifndef _CONFIG_X530_H
#define _CONFIG_X530_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_DISPLAY_BOARDINFO_LATE
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#if !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
#endif
/*
* Serial Port configuration
* The following definitions let you select what serial you want to use
* for your console driver.
*/
/* NAND */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define BBT_CUSTOM_SCAN
#define BBT_CUSTOM_SCAN_PAGE 0
#define BBT_CUSTOM_SCAN_POSITION 2048
/* SPI NOR flash default params, used by sf commands */
#define MTDIDS_DEFAULT "nand0=nand"
#define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)"
#define MTDPARTS_MTDOOPS "errlog"
/* Partition support */
/* Additional FS support/configuration */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
/* Environment in SPI NOR flash */
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_SCAN_SHOW
#endif
/* NAND */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MALLOC_LEN (4 << 20)
#include <asm/arch/config.h>
/*
* Other required minimal configurations
*/
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/* Keep device tree and initrd in low memory so the kernel can access them */
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x10000000\0" \
"initrd_high=0x10000000\0"
#define CONFIG_SYS_LOAD_ADDR 0x1000000
#define CONFIG_UBI_PART user
#define CONFIG_UBIFS_VOLUME user
/* SPL */
/* Defines for SPL */
#define CONFIG_SPL_SIZE (140 << 10)
#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
#endif /* _CONFIG_X530_H */