Haikun Wang e71a980a4d armv8/ls2085aqds: DSPI pin muxing configure through QIXIS ... DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2015-07-20 11:44:39 -07:00
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clock.h	armv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'	2015-07-20 11:44:39 -07:00
config.h	armv8/ls2085aqds: DSPI pin muxing configure through QIXIS	2015-07-20 11:44:39 -07:00
fdt.h	armv8/fsl-lsch3: device tree fixups for PCI stream IDs	2015-07-20 11:44:37 -07:00
fsl_serdes.h	armv8: Add SerDes framework for Layerscape Architecture	2015-04-23 08:55:57 -07:00
gpio.h	ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC	2014-07-03 08:40:51 +02:00
immap_lsch3.h	driver/ldpaa: Add support of WRIOP static data structure	2015-04-23 08:55:58 -07:00
imx-regs.h	ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC	2014-07-03 08:40:51 +02:00
ls2085a_stream_id.h	armv8/fsl-lsch3: partition stream IDs	2015-07-20 11:44:37 -07:00
soc.h	armv8/fsl-ch3: Add support to print SoC personality	2015-07-20 11:44:34 -07:00