mirror of
https://github.com/AsahiLinux/u-boot
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52f6b96d27
The commit64f79f88a7("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") enabled SPI flash support by overriding the spi0 alias. Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes:64f79f88a7("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
146 lines
1.5 KiB
Text
146 lines
1.5 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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spi4 = &sfc;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
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};
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dmc: dmc {
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compatible = "rockchip,rk3568-dmc";
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bootph-all;
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status = "okay";
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};
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otp: nvmem@fe38c000 {
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compatible = "rockchip,rk3568-otp";
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reg = <0x0 0xfe38c000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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cpu_id: id@a {
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reg = <0x0a 0x10>;
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};
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};
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};
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&xin24m {
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bootph-all;
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status = "okay";
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};
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&cru {
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bootph-all;
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status = "okay";
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};
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&pmucru {
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bootph-all;
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status = "okay";
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};
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&grf {
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bootph-all;
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status = "okay";
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};
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&pmugrf {
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bootph-all;
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status = "okay";
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};
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&pinctrl {
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bootph-all;
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};
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&pcfg_pull_none {
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bootph-all;
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};
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&pcfg_pull_up_drv_level_2 {
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bootph-all;
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};
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&pcfg_pull_up {
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bootph-all;
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};
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&emmc_bus8 {
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bootph-all;
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};
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&emmc_clk {
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bootph-all;
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};
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&emmc_cmd {
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bootph-all;
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};
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&emmc_datastrobe {
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bootph-all;
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};
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&emmc_rstnout {
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bootph-all;
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};
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&fspi_pins {
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bootph-all;
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};
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&sdmmc0_bus4 {
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bootph-all;
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};
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&sdmmc0_clk {
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bootph-all;
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};
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&sdmmc0_cmd {
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bootph-all;
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};
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&sdmmc0_det {
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bootph-all;
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};
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&sdmmc0_pwren {
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bootph-all;
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};
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&uart2m0_xfer {
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bootph-all;
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};
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&sdhci {
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bootph-pre-ram;
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status = "okay";
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};
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&sdmmc0 {
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bootph-pre-ram;
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status = "okay";
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};
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#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
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&binman {
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simple-bin-spi {
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mkimage {
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args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
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offset = <0x8000>;
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};
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};
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};
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#endif
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