mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 12:33:41 +00:00
6717e15447
<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of places. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
47 lines
1 KiB
C
47 lines
1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2016 Socionext Inc.
|
|
*/
|
|
|
|
#include <spl.h>
|
|
#include <linux/bitops.h>
|
|
#include <linux/delay.h>
|
|
#include <linux/io.h>
|
|
|
|
#include "../init.h"
|
|
#include "../sc64-regs.h"
|
|
#include "../sg-regs.h"
|
|
|
|
#define SDCTRL_EMMC_HW_RESET 0x59810280
|
|
|
|
void uniphier_ld11_clk_init(void)
|
|
{
|
|
/* if booted from a device other than USB, without stand-by MPU */
|
|
if ((readl(sg_base + SG_PINMON0) & BIT(27)) &&
|
|
uniphier_boot_device_raw() != BOOT_DEVICE_USB) {
|
|
writel(1, sg_base + SG_ETPHYPSHUT);
|
|
writel(1, sg_base + SG_ETPHYCNT);
|
|
|
|
udelay(1); /* wait for regulator level 1.1V -> 2.5V */
|
|
|
|
writel(3, sg_base + SG_ETPHYCNT);
|
|
writel(3, sg_base + SG_ETPHYPSHUT);
|
|
writel(7, sg_base + SG_ETPHYCNT);
|
|
}
|
|
|
|
/* TODO: use "mmc-pwrseq-emmc" */
|
|
writel(1, SDCTRL_EMMC_HW_RESET);
|
|
|
|
#ifdef CONFIG_USB_EHCI_HCD
|
|
{
|
|
int ch;
|
|
|
|
for (ch = 0; ch < 3; ch++) {
|
|
void __iomem *phyctrl = sg_base + SG_USBPHYCTRL;
|
|
|
|
writel(0x82280600, phyctrl + 8 * ch);
|
|
writel(0x00000106, phyctrl + 8 * ch + 4);
|
|
}
|
|
}
|
|
#endif
|
|
}
|