mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-29 22:43:10 +00:00
3b804b370d
Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399 similar to other Rockchip SoCs. Checksum validation fails with: ## Checking hash(es) for Image atf-2 ... sha256 error! Bad hash value for 'hash' hash node in 'atf-2' image node spl_load_simple_fit: can't load image loadables index 1 (ret = -1) mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Add a device tree property, u-boot,spl-fifo-mode, to control when the rockchip_sdhci driver should disable the use of DMA and fallback on PIO mode. Same device tree property is used by the rockchip_dw_mmc driver. In commit2cc6cde647("mmc: rockchip_sdhci: Limit number of blocks read in a single command") the DMA mode was disabled using a CONFIG option on RK3588. Revert that and instead disable DMA using the device tree property for all RK3588 boards, also apply similar workaround for all RK3399 boards. Fixes:2cc6cde647("mmc: rockchip_sdhci: Limit number of blocks read in a single command") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Quentin Schulz <foss+uboot@0leil.net> # RK3399 Puma, RK3588 Tiger
151 lines
2.2 KiB
Text
151 lines
2.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
|
|
*/
|
|
#define USB_CLASS_HUB 9
|
|
|
|
#include "rockchip-u-boot.dtsi"
|
|
|
|
/ {
|
|
aliases {
|
|
mmc0 = &sdhci;
|
|
mmc1 = &sdmmc;
|
|
pci0 = &pcie0;
|
|
spi1 = &spi1;
|
|
};
|
|
|
|
cic: syscon@ff620000 {
|
|
bootph-all;
|
|
compatible = "rockchip,rk3399-cic", "syscon";
|
|
reg = <0x0 0xff620000 0x0 0x100>;
|
|
};
|
|
|
|
dfi: dfi@ff630000 {
|
|
bootph-all;
|
|
reg = <0x00 0xff630000 0x00 0x4000>;
|
|
compatible = "rockchip,rk3399-dfi";
|
|
rockchip,pmu = <&pmugrf>;
|
|
clocks = <&cru PCLK_DDR_MON>;
|
|
clock-names = "pclk_ddr_mon";
|
|
};
|
|
|
|
rng: rng@ff8b8000 {
|
|
compatible = "rockchip,cryptov1-rng";
|
|
reg = <0x0 0xff8b8000 0x0 0x1000>;
|
|
status = "okay";
|
|
};
|
|
|
|
dmc: dmc {
|
|
bootph-all;
|
|
compatible = "rockchip,rk3399-dmc";
|
|
devfreq-events = <&dfi>;
|
|
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
|
|
clocks = <&cru SCLK_DDRCLK>;
|
|
clock-names = "dmc_clk";
|
|
reg = <0x0 0xffa80000 0x0 0x0800
|
|
0x0 0xffa80800 0x0 0x1800
|
|
0x0 0xffa82000 0x0 0x2000
|
|
0x0 0xffa84000 0x0 0x1000
|
|
0x0 0xffa88000 0x0 0x0800
|
|
0x0 0xffa88800 0x0 0x1800
|
|
0x0 0xffa8a000 0x0 0x2000
|
|
0x0 0xffa8c000 0x0 0x1000>;
|
|
};
|
|
|
|
pmusgrf: syscon@ff330000 {
|
|
bootph-all;
|
|
compatible = "rockchip,rk3399-pmusgrf", "syscon";
|
|
reg = <0x0 0xff330000 0x0 0xe3d4>;
|
|
};
|
|
|
|
};
|
|
|
|
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
|
|
&binman {
|
|
multiple-images;
|
|
rom {
|
|
filename = "u-boot.rom";
|
|
size = <0x400000>;
|
|
pad-byte = <0xff>;
|
|
|
|
mkimage {
|
|
args = "-n rk3399 -T rkspi";
|
|
u-boot-spl {
|
|
};
|
|
};
|
|
u-boot-img {
|
|
offset = <0x40000>;
|
|
};
|
|
u-boot {
|
|
offset = <0x300000>;
|
|
};
|
|
fdtmap {
|
|
};
|
|
};
|
|
};
|
|
#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
|
|
|
|
&cru {
|
|
bootph-all;
|
|
};
|
|
|
|
&emmc_phy {
|
|
bootph-all;
|
|
};
|
|
|
|
&grf {
|
|
bootph-all;
|
|
};
|
|
|
|
&pinctrl {
|
|
bootph-all;
|
|
};
|
|
|
|
&pmu {
|
|
bootph-all;
|
|
};
|
|
|
|
&pmugrf {
|
|
bootph-all;
|
|
};
|
|
|
|
&pmu {
|
|
bootph-all;
|
|
};
|
|
|
|
&pmucru {
|
|
bootph-all;
|
|
};
|
|
|
|
&sdhci {
|
|
max-frequency = <200000000>;
|
|
bootph-all;
|
|
u-boot,spl-fifo-mode;
|
|
};
|
|
|
|
&sdmmc {
|
|
bootph-all;
|
|
|
|
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
|
|
u-boot,spl-fifo-mode;
|
|
};
|
|
|
|
&spi1 {
|
|
bootph-all;
|
|
};
|
|
|
|
&uart0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&uart2 {
|
|
bootph-all;
|
|
};
|
|
|
|
&vopb {
|
|
bootph-all;
|
|
};
|
|
|
|
&vopl {
|
|
bootph-all;
|
|
};
|