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u-boot/arch/arm/mach-stm32mp
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Simon Glass 984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE 
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
..
cmd_stm32prog video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO 2022-10-30 20:07:17 +01:00
include/mach stm32mp: add support of STM32MP13x Rev.Y 2022-07-12 11:47:34 +02:00
boot_params.c sandbox: Remove OF_HOSTFILE 2021-10-27 16:38:26 -04:00
bsec.c arm: stm32mp: move the get_otp helper function in bsec 2022-06-17 09:58:21 +02:00
cmd_stm32key.c arm: stm32mp: adapt the command stm32key for STM32MP13x 2022-09-23 14:28:25 +02:00
cpu.c arm: stm32mp: support 2 MAC address for STM32MP13 2022-06-17 09:58:21 +02:00
dram_init.c board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
ecdsa_romapi.c arm: stm32mp1: Implement ECDSA signature verification 2021-08-16 10:49:35 +02:00
fdt.c stm32mp: fdt: update etzpc for STM32MP13x 2022-06-17 10:41:17 +02:00
Kconfig arm: stm32mp: add support of STM32MP13x 2022-06-17 09:58:21 +02:00
Kconfig.13x Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE 2022-10-31 11:01:31 -04:00
Kconfig.15x Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE 2022-10-31 11:01:31 -04:00
Makefile arm: stm32mp: add support of STM32MP13x 2022-06-17 09:58:21 +02:00
psci.c stm32mp: psci: Retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend 2022-05-10 13:54:47 +02:00
pwr_regulator.c arm: stm32mp: migrate trace to log macro 2021-01-13 09:52:58 +01:00
spl.c arm: stm32mp: move code for STM32MP15x 2022-06-17 09:58:21 +02:00
stm32mp13x.c stm32mp: add support of STM32MP13x Rev.Y 2022-07-12 11:47:34 +02:00
stm32mp15x.c stm32mp: simplify the STM32MP15x package parsing code 2022-09-06 13:54:50 +02:00
syscon.c stm32mp: syscon: manage clock when present in device tree 2021-07-16 09:28:46 +02:00
tzc400.c arm: stm32mp: Implement support for TZC 400 controller 2021-07-27 09:48:09 +02:00