mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
9ae600e9e2
Sync these files, obtained from Linux v5.15. This adds a devicetree file for rpi_4 which was not there before. Testing shows no change so far as I can see: - boots to U-Boot prompt on rpi0, rpi2 - boots to distro on rpi3 - boots to distro on rpi4 I am assuming that syncing with Linux is safe, but the maintainer should know for sure. Signed-off-by: Simon Glass <sjg@chromium.org>
207 lines
4.3 KiB
Text
207 lines
4.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/* This include file covers the common peripherals and configuration between
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* bcm2835, bcm2836 and bcm2837 implementations.
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*/
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/ {
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interrupt-parent = <&intc>;
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soc {
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dma: dma@7e007000 {
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compatible = "brcm,bcm2835-dma";
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reg = <0x7e007000 0xf00>;
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interrupts = <1 16>,
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<1 17>,
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<1 18>,
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<1 19>,
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<1 20>,
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<1 21>,
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<1 22>,
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<1 23>,
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<1 24>,
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<1 25>,
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<1 26>,
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/* dma channel 11-14 share one irq */
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<1 27>,
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<1 27>,
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<1 27>,
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<1 27>,
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/* unused shared irq for all channels */
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<1 28>;
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interrupt-names = "dma0",
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"dma1",
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"dma2",
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"dma3",
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"dma4",
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"dma5",
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"dma6",
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"dma7",
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"dma8",
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"dma9",
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"dma10",
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"dma11",
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"dma12",
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"dma13",
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"dma14",
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"dma-shared-all";
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#dma-cells = <1>;
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brcm,dma-channel-mask = <0x7f35>;
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};
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intc: interrupt-controller@7e00b200 {
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compatible = "brcm,bcm2835-armctrl-ic";
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reg = <0x7e00b200 0x200>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pm: watchdog@7e100000 {
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compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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reg = <0x7e100000 0x114>,
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<0x7e00a000 0x24>;
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clocks = <&clocks BCM2835_CLOCK_V3D>,
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<&clocks BCM2835_CLOCK_PERI_IMAGE>,
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<&clocks BCM2835_CLOCK_H264>,
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<&clocks BCM2835_CLOCK_ISP>;
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clock-names = "v3d", "peri_image", "h264", "isp";
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system-power-controller;
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};
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rng@7e104000 {
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compatible = "brcm,bcm2835-rng";
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reg = <0x7e104000 0x10>;
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interrupts = <2 29>;
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};
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pixelvalve@7e206000 {
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compatible = "brcm,bcm2835-pixelvalve0";
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reg = <0x7e206000 0x100>;
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interrupts = <2 13>; /* pwa0 */
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};
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pixelvalve@7e207000 {
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compatible = "brcm,bcm2835-pixelvalve1";
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reg = <0x7e207000 0x100>;
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interrupts = <2 14>; /* pwa1 */
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};
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thermal: thermal@7e212000 {
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compatible = "brcm,bcm2835-thermal";
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reg = <0x7e212000 0x8>;
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clocks = <&clocks BCM2835_CLOCK_TSENS>;
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#thermal-sensor-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@7e805000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e805000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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};
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vec: vec@7e806000 {
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compatible = "brcm,bcm2835-vec";
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reg = <0x7e806000 0x1000>;
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clocks = <&clocks BCM2835_CLOCK_VEC>;
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interrupts = <2 27>;
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status = "disabled";
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};
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pixelvalve@7e807000 {
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compatible = "brcm,bcm2835-pixelvalve2";
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reg = <0x7e807000 0x100>;
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interrupts = <2 10>; /* pixelvalve */
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};
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hdmi: hdmi@7e902000 {
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compatible = "brcm,bcm2835-hdmi";
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reg = <0x7e902000 0x600>,
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<0x7e808000 0x100>;
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interrupts = <2 8>, <2 9>;
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ddc = <&i2c2>;
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clocks = <&clocks BCM2835_PLLH_PIX>,
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<&clocks BCM2835_CLOCK_HSM>;
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clock-names = "pixel", "hdmi";
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dmas = <&dma 17>;
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dma-names = "audio-rx";
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status = "disabled";
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};
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v3d: v3d@7ec00000 {
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compatible = "brcm,bcm2835-v3d";
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reg = <0x7ec00000 0x1000>;
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interrupts = <1 10>;
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};
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vc4: gpu {
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compatible = "brcm,bcm2835-vc4";
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};
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};
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};
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&cpu_thermal {
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thermal-sensors = <&thermal>;
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};
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&gpio {
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i2c_slave_gpio18: i2c_slave_gpio18 {
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brcm,pins = <18 19 20 21>;
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brcm,function = <BCM2835_FSEL_ALT3>;
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};
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jtag_gpio4: jtag_gpio4 {
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brcm,pins = <4 5 6 12 13>;
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brcm,function = <BCM2835_FSEL_ALT5>;
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};
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pwm0_gpio12: pwm0_gpio12 {
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brcm,pins = <12>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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pwm0_gpio18: pwm0_gpio18 {
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brcm,pins = <18>;
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brcm,function = <BCM2835_FSEL_ALT5>;
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};
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pwm0_gpio40: pwm0_gpio40 {
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brcm,pins = <40>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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pwm1_gpio13: pwm1_gpio13 {
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brcm,pins = <13>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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pwm1_gpio19: pwm1_gpio19 {
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brcm,pins = <19>;
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brcm,function = <BCM2835_FSEL_ALT5>;
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};
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pwm1_gpio41: pwm1_gpio41 {
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brcm,pins = <41>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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pwm1_gpio45: pwm1_gpio45 {
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brcm,pins = <45>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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};
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&i2s {
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dmas = <&dma 2>, <&dma 3>;
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dma-names = "tx", "rx";
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};
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&sdhost {
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dmas = <&dma 13>;
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dma-names = "rx-tx";
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};
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&spi {
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dmas = <&dma 6>, <&dma 7>;
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dma-names = "tx", "rx";
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};
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