mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 15:23:07 +00:00
b2d5ac5985
This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
135 lines
5.3 KiB
Text
135 lines
5.3 KiB
Text
#
|
|
# Copyright 2014 Freescale Semiconductor
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
Freescale LayerScape with Chassis Generation 3
|
|
|
|
This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
|
|
for example LS2085A.
|
|
|
|
Flash Layout
|
|
============
|
|
|
|
(1) A typical layout of various images (including Linux and other firmware images)
|
|
is shown below considering a 32MB NOR flash device present on most
|
|
pre-silicon platforms (simulator and emulator):
|
|
|
|
-------------------------
|
|
| FIT Image |
|
|
| (linux + DTB + RFS) |
|
|
------------------------- ----> 0x0120_0000
|
|
| Debug Server FW |
|
|
------------------------- ----> 0x00C0_0000
|
|
| AIOP FW |
|
|
------------------------- ----> 0x0070_0000
|
|
| MC FW |
|
|
------------------------- ----> 0x006C_0000
|
|
| MC DPL Blob |
|
|
------------------------- ----> 0x0020_0000
|
|
| BootLoader + Env|
|
|
------------------------- ----> 0x0000_1000
|
|
| PBI |
|
|
------------------------- ----> 0x0000_0080
|
|
| RCW |
|
|
------------------------- ----> 0x0000_0000
|
|
|
|
32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
|
|
|
|
(2) A typical layout of various images (including Linux and other firmware images)
|
|
is shown below considering a 128MB NOR flash device present on QDS and RDB
|
|
boards:
|
|
----------------------------------------- ----> 0x5_8800_0000 ---
|
|
| .. Unused .. (7M) | |
|
|
----------------------------------------- ----> 0x5_8790_0000 |
|
|
| FIT Image (linux + DTB + RFS) (40M) | |
|
|
----------------------------------------- ----> 0x5_8510_0000 |
|
|
| PHY firmware (2M) | |
|
|
----------------------------------------- ----> 0x5_84F0_0000 | 64K
|
|
| Debug Server FW (2M) | | Alt
|
|
----------------------------------------- ----> 0x5_84D0_0000 | Bank
|
|
| AIOP FW (4M) | |
|
|
----------------------------------------- ----> 0x5_8490_0000 (vbank4)
|
|
| MC DPC Blob (1M) | |
|
|
----------------------------------------- ----> 0x5_8480_0000 |
|
|
| MC DPL Blob (1M) | |
|
|
----------------------------------------- ----> 0x5_8470_0000 |
|
|
| MC FW (4M) | |
|
|
----------------------------------------- ----> 0x5_8430_0000 |
|
|
| BootLoader Environment (1M) | |
|
|
----------------------------------------- ----> 0x5_8420_0000 |
|
|
| BootLoader (1M) | |
|
|
----------------------------------------- ----> 0x5_8410_0000 |
|
|
| RCW and PBI (1M) | |
|
|
----------------------------------------- ----> 0x5_8400_0000 ---
|
|
| .. Unused .. (7M) | |
|
|
----------------------------------------- ----> 0x5_8390_0000 |
|
|
| FIT Image (linux + DTB + RFS) (40M) | |
|
|
----------------------------------------- ----> 0x5_8110_0000 |
|
|
| PHY firmware (2M) | |
|
|
----------------------------------------- ----> 0x5_80F0_0000 | 64K
|
|
| Debug Server FW (2M) | | Bank
|
|
----------------------------------------- ----> 0x5_80D0_0000 |
|
|
| AIOP FW (4M) | |
|
|
----------------------------------------- ----> 0x5_8090_0000 (vbank0)
|
|
| MC DPC Blob (1M) | |
|
|
----------------------------------------- ----> 0x5_8080_0000 |
|
|
| MC DPL Blob (1M) | |
|
|
----------------------------------------- ----> 0x5_8070_0000 |
|
|
| MC FW (4M) | |
|
|
----------------------------------------- ----> 0x5_8030_0000 |
|
|
| BootLoader Environment (1M) | |
|
|
----------------------------------------- ----> 0x5_8020_0000 |
|
|
| BootLoader (1M) | |
|
|
----------------------------------------- ----> 0x5_8010_0000 |
|
|
| RCW and PBI (1M) | |
|
|
----------------------------------------- ----> 0x5_8000_0000 ---
|
|
|
|
128-MB NOR flash layout for QDS and RDB boards
|
|
|
|
Environment Variables
|
|
=====================
|
|
mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
|
|
the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.
|
|
|
|
mcmemsize: MC DRAM block size. If this variable is not defined, the value
|
|
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
|
|
|
|
Booting from NAND
|
|
-------------------
|
|
Booting from NAND requires two images, RCW and u-boot-with-spl.bin.
|
|
The difference between NAND boot RCW image and NOR boot image is the PBI
|
|
command sequence. Below is one example for PBI commands for QDS which uses
|
|
NAND device with 2KB/page, block size 128KB.
|
|
|
|
1) CCSR 4-byte write to 0x00e00404, data=0x00000000
|
|
2) CCSR 4-byte write to 0x00e00400, data=0x1800a000
|
|
The above two commands set bootloc register to 0x00000000_1800a000 where
|
|
the u-boot code will be running in OCRAM.
|
|
|
|
3) Block Copy: SRC=0x0107, SRC_ADDR=0x00020000, DEST_ADDR=0x1800a000,
|
|
BLOCK_SIZE=0x00014000
|
|
This command copies u-boot image from NAND device into OCRAM. The values need
|
|
to adjust accordingly.
|
|
|
|
SRC should match the cfg_rcw_src, the reset config pins. It depends
|
|
on the NAND device. See reference manual for cfg_rcw_src.
|
|
SRC_ADDR is the offset of u-boot-with-spl.bin image in NAND device. In
|
|
the example above, 128KB. For easy maintenance, we put it at
|
|
the beginning of next block from RCW.
|
|
DEST_ADDR is fixed at 0x1800a000, matching bootloc set above.
|
|
BLOCK_SIZE is the size to be copied by PBI.
|
|
|
|
RCW image should be written to the beginning of NAND device. Example of using
|
|
u-boot command
|
|
|
|
nand write <rcw image in memory> 0 <size of rcw image>
|
|
|
|
To form the NAND image, build u-boot with NAND config, for example,
|
|
ls2085aqds_nand_defconfig. The image needed is u-boot-with-spl.bin.
|
|
The u-boot image should be written to match SRC_ADDR, in above example 0x20000.
|
|
|
|
nand write <u-boot image in memory> 200000 <size of u-boot image>
|
|
|
|
With these two images in NAND device, the board can boot from NAND.
|