mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 18:41:03 +00:00
984639039f
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
103 lines
2.6 KiB
Text
103 lines
2.6 KiB
Text
CONFIG_ARM=y
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CONFIG_COUNTER_FREQUENCY=16666666
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_RMOBILE=y
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CONFIG_TEXT_BASE=0x50000000
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CONFIG_SYS_MALLOC_LEN=0x4000000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0xFFFE0000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot"
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CONFIG_SPL_TEXT_BASE=0xe6318000
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CONFIG_RCAR_GEN3=y
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CONFIG_TARGET_DRAAK=y
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CONFIG_SYS_LOAD_ADDR=0x58000000
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CONFIG_REMAKE_ELF=y
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CONFIG_FIT=y
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CONFIG_SUPPORT_RAW_INITRD=y
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CONFIG_SYS_MONITOR_BASE=0x00000000
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CONFIG_USE_BOOTARGS=y
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000"
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CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
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CONFIG_SYS_MALLOC_BOOTPARAMS=y
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CONFIG_UPDATE_TFTP=y
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0xe631f000
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CONFIG_SPL_BSS_MAX_SIZE=0x1000
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0xe6304000
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_MAXARGS=64
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CONFIG_SYS_PBSIZE=2068
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_DTB_PROPS_REMOVE=y
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CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_PART=2
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CONFIG_VERSION_VARIABLE=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CLK=y
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CONFIG_CLK_RENESAS=y
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CONFIG_DFU_TFTP=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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CONFIG_RCAR_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_RCAR_IIC=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS200_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
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CONFIG_CFI_FLASH=y
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CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_RENESAS_RPC_HF=y
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CONFIG_SYS_MAX_FLASH_SECT=256
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CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_BITBANGMII=y
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CONFIG_BITBANGMII_MULTI=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_RENESAS_RAVB=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_RENESAS_RPC_SPI=y
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CONFIG_TEE=y
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CONFIG_OPTEE=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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