mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-01-04 09:18:52 +00:00
2e8d2f8843
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got introduced, in order to support a DTB handed over by an earlier stage boo loader. However we have another option in the Kconfig (OF_BOARD) which has identical semantics. On RISC-V some of the boards pick up the DTB from a1 and copy it in their private gd_t. Apart from that they copy it to prior_stage_fdt_address, if the Kconfig option is selected, which is unnecessary. So let's switch the config option for those boards to OF_BOARD and define the required board_fdt_blob_setup() for them. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
133 lines
2.3 KiB
C
133 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*/
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#include <common.h>
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#include <flash.h>
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#include <image.h>
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#include <init.h>
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#include <net.h>
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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#include <netdev.h>
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#endif
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#include <asm/global_data.h>
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#include <linux/io.h>
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#include <faraday/ftsmc020.h>
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#include <fdtdec.h>
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#include <dm.h>
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#include <spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscellaneous platform dependent initializations
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*/
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
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return 0;
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}
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int dram_init(void)
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{
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
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int board_eth_init(struct bd_info *bd)
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{
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return ftmac100_initialize(bd);
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}
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#endif
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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return 0;
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}
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void *board_fdt_blob_setup(void)
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{
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#if CONFIG_IS_ENABLED(OF_BOARD)
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return (void *)(ulong)gd->arch.firmware_fdt_addr;
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#elif CONFIG_IS_ENABLED(OF_SEPARATE)
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return (void *)CONFIG_SYS_FDT_BASE;
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#else
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return NULL;
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#endif
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}
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int smc_init(void)
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{
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int node = -1;
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const char *compat = "andestech,atfsmc020";
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void *blob = (void *)gd->fdt_blob;
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fdt_addr_t addr;
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struct ftsmc020_bank *regs;
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node = fdt_node_offset_by_compatible(blob, -1, compat);
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if (node < 0)
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return -FDT_ERR_NOTFOUND;
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addr = fdtdec_get_addr_size_auto_noparent(blob, node,
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"reg", 0, NULL, false);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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regs = (struct ftsmc020_bank *)(uintptr_t)addr;
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regs->cr &= ~FTSMC020_BANK_WPROT;
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return 0;
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}
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static void v5l2_init(void)
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{
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struct udevice *dev;
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uclass_get_device(UCLASS_CACHE, 0, &dev);
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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smc_init();
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v5l2_init();
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return 0;
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}
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#endif
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#ifdef CONFIG_SPL
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void board_boot_order(u32 *spl_boot_list)
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{
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u8 i;
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u32 boot_devices[] = {
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#ifdef CONFIG_SPL_RAM_SUPPORT
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BOOT_DEVICE_RAM,
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#endif
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#ifdef CONFIG_SPL_MMC
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BOOT_DEVICE_MMC1,
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#endif
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};
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for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
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spl_boot_list[i] = boot_devices[i];
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}
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#endif
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* boot using first FIT config */
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return 0;
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}
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#endif
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