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https://github.com/AsahiLinux/u-boot
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1379c7cfc9
To prepare for ROCK 4 SE support, changes are needed to the common ROCK
Pi 4 devicetree to move the OPP from the common devicetree to individual
board devicetrees. Sync the Rockchip RK3399 ROCK Pi 4-related DTs from
Linux to gain from these changes.
Kernel tag: next-20230719
Kernel commits:
cfa12c32b96f ("arm64: dts: rockchip: correct wifi interrupt flag in Rock \
Pi 4B")
cee572756aa2 ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK Pi 4")
2bd1d2dd808c ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK 4C+")
fd2762a62646 ("arm64: dts: rockchip: Move OPP table from ROCK Pi 4 dtsi")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
70 lines
1.5 KiB
Text
70 lines
1.5 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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* Copyright (c) 2019 Radxa Limited
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* Copyright (c) 2019 Amarula Solutions(India)
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*/
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/dts-v1/;
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#include "rk3399-rock-pi-4.dtsi"
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#include "rk3399-opp.dtsi"
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/ {
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model = "Radxa ROCK Pi 4C";
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compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
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aliases {
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mmc2 = &sdio0;
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};
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};
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&es8316 {
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pinctrl-0 = <&hp_detect &hp_int>;
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pinctrl-names = "default";
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interrupt-parent = <&gpio1>;
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interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>;
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};
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&sdio0 {
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status = "okay";
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brcmf: wifi@1 {
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compatible = "brcm,bcm4329-fmac";
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reg = <1>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host-wake";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_l>;
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};
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};
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&sound {
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hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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};
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&uart0 {
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm4345c5";
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clocks = <&rk808 1>;
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clock-names = "lpo";
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device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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max-speed = <1500000>;
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pinctrl-names = "default";
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pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
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vbat-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc_1v8>;
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};
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};
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&vcc5v0_host {
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gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
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};
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&vcc5v0_host_en {
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rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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