Marek Vasut 42f4b83b52 ARM: socfpga: Init missing security policies on A10 ... The Arria10 requires proper configuration of the NOC firewall, otherwise the access to certain areas of the LWHPS bridge fails in Linux. Add the missing setup. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>		2018-07-25 00:13:32 +02:00
..
include/mach	ddr: altera: stratix10: Add DDR support for Stratix10 SoC	2018-07-12 09:22:12 +02:00
board.c	ARM: socfpga: Assure correct CPACR configuration	2018-07-25 00:13:32 +02:00
clock_manager.c
clock_manager_arria10.c
clock_manager_gen5.c
clock_manager_s10.c
fpga_manager.c
freeze_controller.c
Kconfig	arm: socfpga: stratix10: Enable Stratix10 SoC build	2018-07-12 09:22:12 +02:00
mailbox_s10.c
Makefile	arm: socfpga: stratix10: Add timer support for Stratix10 SoC	2018-07-12 09:22:12 +02:00
misc.c	lib: fdtdec: Rename routine fdtdec_setup_memory_size()	2018-07-19 10:49:56 +02:00
misc_arria10.c	ARM: socfpga: Init missing security policies on A10	2018-07-25 00:13:32 +02:00
misc_gen5.c
misc_s10.c
mmu-arm64_s10.c	arm: socfpga: stratix10: Add MMU support for Stratix10 SoC	2018-07-12 09:22:11 +02:00
pinmux_arria10.c
qts-filter.sh
reset_manager.c
reset_manager_arria10.c
reset_manager_gen5.c
reset_manager_s10.c
scan_manager.c
spl_a10.c	Merge branch 'master' of git://git.denx.de/u-boot-socfpga	2018-07-13 14:47:04 -04:00
spl_gen5.c	arm: socfpga: Restructure the SPL file	2018-07-12 09:22:11 +02:00
spl_s10.c	arm: socfpga: Fixes: include <debug_uart.h>	2018-07-12 16:03:35 +02:00
system_manager_gen5.c
system_manager_s10.c
timer.c
timer_s10.c	arm: socfpga: stratix10: Add timer support for Stratix10 SoC	2018-07-12 09:22:12 +02:00
wrap_iocsr_config.c
wrap_pinmux_config.c
wrap_pinmux_config_s10.c
wrap_pll_config.c
wrap_pll_config_s10.c
wrap_sdram_config.c