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https://github.com/AsahiLinux/u-boot
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52f6b96d27
The commit64f79f88a7("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") enabled SPI flash support by overriding the spi0 alias. Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes:64f79f88a7("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
68 lines
1,022 B
Text
68 lines
1,022 B
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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* (C) Copyright 2023 Akash Gajjar <gajjar04akash@gmail.com>
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*/
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#include "rk356x-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart2;
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};
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};
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&pcie2x1 {
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pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>;
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};
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&pcie3x2 {
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pinctrl-0 = <&pcie30x2m1_pins &pcie3x2_reset_h>;
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};
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&pinctrl {
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pcie {
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pcie3x2_reset_h: pcie3x2-reset-h {
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rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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};
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&sfc {
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bootph-pre-ram;
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u-boot,spl-sfc-no-dma;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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flash@0 {
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bootph-pre-ram;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&sdmmc2 {
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status = "disabled";
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};
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&uart1 {
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status = "disabled";
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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status = "okay";
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};
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