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https://github.com/AsahiLinux/u-boot
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2cf431c228
This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
190 lines
4.1 KiB
C
190 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2010 Freescale Semiconductor, Inc.
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* Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
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*/
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#include <common.h>
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#include <hwconfig.h>
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#include <i2c.h>
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#include <init.h>
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#include <spi.h>
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#include <linux/libfdt.h>
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#include <fdt_support.h>
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#include <pci.h>
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#include <mpc83xx.h>
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#include <vsc7385.h>
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#include <netdev.h>
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#include <fsl_esdhc.h>
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#include <asm/io.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_mpc83xx_serdes.h>
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/*
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* The following are used to control the SPI chip selects for the SPI command.
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*/
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#ifdef CONFIG_MPC8XXX_SPI
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#define SPI_CS_MASK 0x00400000
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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return bus == 0 && cs == 0;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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/* active low */
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clrbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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/* inactive high */
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setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
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}
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#endif /* CONFIG_MPC8XXX_SPI */
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#ifdef CONFIG_FSL_ESDHC
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int board_mmc_init(bd_t *bd)
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{
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return fsl_esdhc_mmc_init(bd);
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}
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#endif
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static u8 read_board_info(void)
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{
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u8 val8;
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i2c_set_bus_num(0);
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if (i2c_read(CONFIG_SYS_I2C_PCF8574A_ADDR, 0, 0, &val8, 1) == 0)
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return val8;
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else
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return 0;
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}
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int checkboard(void)
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{
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static const char * const rev_str[] = {
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"1.0",
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"<reserved>",
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"<reserved>",
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"<reserved>",
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"<unknown>",
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};
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u8 info;
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int i;
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info = read_board_info();
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i = (!info) ? 4 : info & 0x03;
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printf("Board: Freescale MPC8308RDB Rev %s\n", rev_str[i]);
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return 0;
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}
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static struct pci_region pcie_regions_0[] = {
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{
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.bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
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.phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
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.size = CONFIG_SYS_PCIE1_MEM_SIZE,
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.flags = PCI_REGION_MEM,
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},
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{
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.bus_start = CONFIG_SYS_PCIE1_IO_BASE,
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.phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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.size = CONFIG_SYS_PCIE1_IO_SIZE,
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.flags = PCI_REGION_IO,
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},
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};
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void pci_init_board(void)
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{
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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sysconf83xx_t *sysconf = &immr->sysconf;
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law83xx_t *pcie_law = sysconf->pcielaw;
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struct pci_region *pcie_reg[] = { pcie_regions_0 };
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fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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/* Deassert the resets in the control register */
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out_be32(&sysconf->pecr1, 0xE0008000);
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udelay(2000);
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/* Configure PCI Express Local Access Windows */
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out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
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out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
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mpc83xx_pcie_init(1, pcie_reg);
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}
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/*
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* Miscellaneous late-boot configurations
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*
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* If a VSC7385 microcode image is present, then upload it.
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*/
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int misc_init_r(void)
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{
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#ifdef CONFIG_MPC8XXX_SPI
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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sysconf83xx_t *sysconf = &immr->sysconf;
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/*
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* Set proper bits in SICRH to allow SPI on header J8
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*
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* NOTE: this breaks the TSEC2 interface, attached to the Vitesse
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* switch. The pinmux configuration does not have a fine enough
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* granularity to support both simultaneously.
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*/
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clrsetbits_be32(&sysconf->sicrh, SICRH_GPIO_A_TSEC2, SICRH_GPIO_A_GPIO);
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puts("WARNING: SPI enabled, TSEC2 support is broken\n");
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/* Set header J8 SPI chip select output, disabled */
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setbits_be32(&immr->gpio[0].dir, SPI_CS_MASK);
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setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
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#endif
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#ifdef CONFIG_VSC7385_IMAGE
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if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
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CONFIG_VSC7385_IMAGE_SIZE)) {
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puts("Failure uploading VSC7385 microcode.\n");
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return 1;
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}
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#endif
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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fsl_fdt_fixup_dr_usb(blob, bd);
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fdt_fixup_esdhc(blob, bd);
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return 0;
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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int rv, num_if = 0;
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/* Initialize TSECs first */
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rv = cpu_eth_init(bis);
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if (rv >= 0)
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num_if += rv;
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else
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printf("ERROR: failed to initialize TSECs.\n");
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rv = pci_eth_init(bis);
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if (rv >= 0)
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num_if += rv;
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else
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printf("ERROR: failed to initialize PCI Ethernet.\n");
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return num_if;
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}
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