mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
fe1b4db05e
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/*
|
|
* (C) Copyright 2007-2011
|
|
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
|
|
* Tom Cubie <tangliang@allwinnertech.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/gpio.h>
|
|
|
|
int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
|
|
{
|
|
u32 bank = GPIO_BANK(pin);
|
|
u32 index = GPIO_CFG_INDEX(pin);
|
|
u32 offset = GPIO_CFG_OFFSET(pin);
|
|
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
|
|
|
|
clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int sunxi_gpio_get_cfgpin(u32 pin)
|
|
{
|
|
u32 cfg;
|
|
u32 bank = GPIO_BANK(pin);
|
|
u32 index = GPIO_CFG_INDEX(pin);
|
|
u32 offset = GPIO_CFG_OFFSET(pin);
|
|
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
|
|
|
|
cfg = readl(&pio->cfg[0] + index);
|
|
cfg >>= offset;
|
|
|
|
return cfg & 0xf;
|
|
}
|
|
|
|
int sunxi_gpio_set_drv(u32 pin, u32 val)
|
|
{
|
|
u32 bank = GPIO_BANK(pin);
|
|
u32 index = GPIO_DRV_INDEX(pin);
|
|
u32 offset = GPIO_DRV_OFFSET(pin);
|
|
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
|
|
|
|
clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int sunxi_gpio_set_pull(u32 pin, u32 val)
|
|
{
|
|
u32 bank = GPIO_BANK(pin);
|
|
u32 index = GPIO_PULL_INDEX(pin);
|
|
u32 offset = GPIO_PULL_OFFSET(pin);
|
|
struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
|
|
|
|
clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);
|
|
|
|
return 0;
|
|
}
|