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https://github.com/AsahiLinux/u-boot
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3049a583f3
LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
59 lines
932 B
Text
59 lines
932 B
Text
/*
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* NXP LS2081A RDB board device tree source for QSPI-boot
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*
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* Author: Priyanka Jain <priyanka.jain@nxp.com>
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*
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* Copyright 2017 NXP
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "fsl-ls2080a.dtsi"
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/ {
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model = "Freescale Layerscape 2081a RDB Board";
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compatible = "fsl,ls2081a-rdb", "fsl,ls2080a";
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aliases {
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spi0 = &qspi;
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spi1 = &dspi;
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q512a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: n25q512a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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qflash1: n25q512a@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <50000000>;
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reg = <1>;
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};
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};
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