u-boot/drivers/cpu
Sagar Shrikant Kadam add0dc1f7d riscv: cpu: check and append L1 cache to cpu features
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
..
bmips_cpu.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
cpu-uclass.c uclass: cpu: fix to display proper CPU features 2020-07-01 15:01:27 +08:00
cpu_sandbox.c cpu: sandbox: support is_current 2020-05-03 15:45:49 +02:00
imx8_cpu.c cpu: imx8: use intended cpu-thermal device when getting temp value 2020-05-22 13:27:46 +02:00
Kconfig cpu: Add a RISC-V CPU driver 2018-12-18 09:56:26 +08:00
Makefile imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c 2019-10-08 16:35:59 +02:00
mpc83xx_cpu.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
mpc83xx_cpu.h cpu: Add MPC83xx CPU driver 2018-09-18 08:12:21 -06:00
riscv_cpu.c riscv: cpu: check and append L1 cache to cpu features 2020-07-01 15:01:27 +08:00