mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 00:21:06 +00:00
edca8cf721
This converts the following to Kconfig: CONFIG_SCSI_AHCI_PLAT CONFIG_SYS_SCSI_MAX_SCSI_ID CONFIG_SYS_SCSI_MAX_LUN CONFIG_SYS_SATA_MAX_DEVICE Drop CONFIG_SCSI for everything except the sandbox build. We only need one build for tests. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
87 lines
2.2 KiB
Text
87 lines
2.2 KiB
Text
CONFIG_PPC=y
|
|
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
|
CONFIG_SYS_MALLOC_LEN=0x100000
|
|
CONFIG_ENV_SIZE=0x2000
|
|
CONFIG_ENV_OFFSET=0x100000
|
|
CONFIG_ENV_SECT_SIZE=0x10000
|
|
CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
|
|
CONFIG_MPC85xx=y
|
|
CONFIG_TARGET_P2041RDB=y
|
|
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
|
CONFIG_MP=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
|
|
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
|
CONFIG_RAMBOOT_PBL=y
|
|
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
|
|
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
|
|
CONFIG_BOOTDELAY=10
|
|
CONFIG_USE_BOOTCOMMAND=y
|
|
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
|
CONFIG_BOARD_EARLY_INIT_F=y
|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
|
CONFIG_ID_EEPROM=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_CMD_IMLS=y
|
|
CONFIG_CMD_GREPENV=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
CONFIG_CMD_DM=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_DM=y
|
|
CONFIG_SYS_SATA_MAX_DEVICE=2
|
|
CONFIG_FSL_CAAM=y
|
|
CONFIG_SYS_BR0_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR0_PRELIM=0xE8001001
|
|
CONFIG_SYS_OR0_PRELIM=0xF8000F85
|
|
CONFIG_SYS_BR3_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR3_PRELIM=0xFFDF0801
|
|
CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
|
CONFIG_SYS_I2C_FSL=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
|
|
CONFIG_FSL_ESDHC=y
|
|
CONFIG_MTD=y
|
|
CONFIG_MTD_NOR_FLASH=y
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
|
CONFIG_SYS_FLASH_CFI=y
|
|
CONFIG_DM_SPI_FLASH=y
|
|
CONFIG_SF_DEFAULT_SPEED=10000000
|
|
CONFIG_SPI_FLASH_SPANSION=y
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_PHYLIB_10G=y
|
|
CONFIG_PHY_TERANETICS=y
|
|
CONFIG_PHY_VITESSE=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_DM_MDIO=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_E1000=y
|
|
CONFIG_FMAN_ENET=y
|
|
CONFIG_SYS_FMAN_FW_ADDR=0x110000
|
|
CONFIG_MII=y
|
|
CONFIG_PCIE_FSL=y
|
|
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_SPI=y
|
|
CONFIG_DM_SPI=y
|
|
CONFIG_FSL_ESPI=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_EHCI_FSL=y
|
|
CONFIG_USB_STORAGE=y
|
|
CONFIG_ADDR_MAP=y
|
|
CONFIG_SYS_NUM_ADDR_MAP=64
|