mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 23:47:24 +00:00
ab644db9ba
Video out on RK3288 boards has been broken since from few
releases due to the adding of reset support on vop but
missed enabling DM_RESET on associated boards.
This patch fixes those RK3288 boards.
Cc: Simon Glass <sjg@chromium.org>
Cc: Lin Huang <hl@rock-chips.com>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Fixes: <9749d2ea29e1> ("rockchip: video: vop: Add reset support")
Reported-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
98 lines
2.5 KiB
Text
98 lines
2.5 KiB
Text
CONFIG_ARM=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_SYS_ARCH_TIMER=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_TEXT_BASE=0x01000000
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_TARGET_EVB_RK3288=y
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CONFIG_SPL_STACK_R_ADDR=0x04000000
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CONFIG_SPL_SIZE_LIMIT=0x4b000
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SYS_LOAD_ADDR=0x800800
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CONFIG_DEBUG_UART=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
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CONFIG_SYS_MONITOR_LEN=614400
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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# CONFIG_USE_SPL_FIT_GENERATOR is not set
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CONFIG_USE_PREBOOT=y
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CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"
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CONFIG_SILENT_CONSOLE=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_NO_BSS_LIMIT=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0xff718000
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
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CONFIG_SPL_OPTEE_IMAGE=y
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CONFIG_SYS_BOOTM_LEN=0x4000000
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_USB_MASS_STORAGE=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MTD=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_ACT8846=y
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CONFIG_REGULATOR_ACT8846=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DM_RESET=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_DWC2=y
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CONFIG_ROCKCHIP_USB2_PHY=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_VIDEO=y
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# CONFIG_VIDEO_BPP8 is not set
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
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CONFIG_DISPLAY_ROCKCHIP_MIPI=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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