mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-26 20:37:16 +00:00
cd2f9031e4
On probe, the SPI NOR core will put a flash in 8D mode if it supports it. But Linux as of now expects to get the flash in 1S mode. Handing the flash to Linux in Octal DTR mode means the kernel will fail to detect the flash. This commit adds an option to soft reset the flash after spl_spi_load_image() so that the flash can be reset to 1S mode and subsequent spi-nor probe in Linux does not fail, since spl_spi_load_image() performs spi_flash_probe() the remove is added after completion loading images in spi_flash_probe() itself. Tested on J721E EVM with 5.10 Linux kernel. Linux spi-nor probe without the fix: root@j7-evm:~# dmesg | grep spi-nor [ 4.928023] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff [ 4.934938] spi-nor: probe of spi0.0 failed with error -2 Linux spi-nor probe with the fix: root@j7-evm:~# dmesg | grep spi-nor [ 4.904484] spi-nor spi0.0: mt35xu512aba (65536 Kbytes) Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Kconfig.nxp | ||
| Kconfig.tpl | ||
| Kconfig.vpl | ||
| Makefile | ||
| spl.c | ||
| spl_atf.c | ||
| spl_bootrom.c | ||
| spl_dfu.c | ||
| spl_ext.c | ||
| spl_fat.c | ||
| spl_fit.c | ||
| spl_legacy.c | ||
| spl_mmc.c | ||
| spl_nand.c | ||
| spl_net.c | ||
| spl_nor.c | ||
| spl_onenand.c | ||
| spl_opensbi.c | ||
| spl_optee.S | ||
| spl_ram.c | ||
| spl_sata.c | ||
| spl_sdp.c | ||
| spl_semihosting.c | ||
| spl_spi.c | ||
| spl_ubi.c | ||
| spl_usb.c | ||
| spl_xip.c | ||
| spl_ymodem.c | ||