mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
612a2a0af4
Since we implement the dram capacity auto detect, we don't need to set the channel number and sdram-channel in dts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Vagrant Cascadian <vagrant@debian.org>
57 lines
892 B
Text
57 lines
892 B
Text
/*
|
|
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+ X11
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "rk3288-fennec.dtsi"
|
|
|
|
/ {
|
|
model = "Rockchip RK3288 Fennec Board";
|
|
compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
|
|
|
|
chosen {
|
|
stdout-path = &uart2;
|
|
};
|
|
};
|
|
|
|
&dmc {
|
|
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
|
|
0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
|
|
0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
|
|
0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
|
|
0x8 0x1f4>;
|
|
rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
|
|
0x0 0xc3 0x6 0x2>;
|
|
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
|
|
};
|
|
|
|
&pinctrl {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
u-boot,dm-pre-reloc;
|
|
reg-shift = <2>;
|
|
};
|
|
|
|
&sdmmc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&emmc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&gpio3 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&gpio8 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|