u-boot/arch/riscv/cpu/fu540
Pragnesh Patel f517e5fe98 riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Enable support for SiFive FU540 Opencores I2C master controller.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-28 08:30:41 +01:00
..
cache.c riscv: fu540: Use correct API to get L2 cache controller base address 2020-08-25 09:33:16 +08:00
cpu.c riscv: cpu: fu540: Add support for cpu fu540 2020-06-04 09:44:09 +08:00
dram.c riscv: cpu: fu540: Add support for cpu fu540 2020-06-04 09:44:09 +08:00
Kconfig riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller 2020-11-28 08:30:41 +01:00
Makefile riscv: sifive: fu540: enable all cache ways from U-Boot proper 2020-07-03 15:09:06 +08:00
spl.c riscv: sifive/fu540: spl: Rename soc_spl_init() 2020-08-14 14:38:53 +08:00