Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-17 18:28:55 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/arch/arm/dts/imx6qdl-gw5912.dtsi
Tim Harvey 19a387f85d imx: ventana: enable dm support for MMC and SATA 
Enable driver model support for MMC and SATA.

Note that DM_MMC requires aliases for your mmc devices so
they are added to the dts. Linux does not support enumerating mmc
devices by alias so these are not present in the Linux dts.

Note that we still need board_mmc_init() and board_mmc_getcd() for
not DM SPL to support MMC.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-04-08 20:29:53 +02:00

609 lines
12 KiB
Text
Raw Blame History

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2019 Gateworks Corporation
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
mmc0 = &usdhc3;
nand = &gpmi;
usb0 = &usbh1;
usb1 = &usbotg;
};
chosen {
stdout-path = &uart2;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
interrupts = <0>;
};
key-erased {
label = "key-erased";
linux,code = <BTN_2>;
interrupt-parent = <&gsc>;
interrupts = <1>;
};
eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;
interrupts = <2>;
};
tamper {
label = "tamper";
linux,code = <BTN_4>;
interrupt-parent = <&gsc>;
interrupts = <5>;
};
switch-hold {
label = "switch_hold";
linux,code = <BTN_5>;
interrupt-parent = <&gsc>;
interrupts = <7>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_vbus: regulator-5p0v {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&ecspi2 {
cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
status = "okay";
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
gsc: gsc@20 {
compatible = "gw,gsc";
reg = <0x20>;
interrupt-parent = <&gpio1>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
adc {
compatible = "gw,gsc-adc";
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
gw,mode = <0>;
reg = <0x00>;
label = "temp";
};
channel@2 {
gw,mode = <1>;
reg = <0x02>;
label = "vdd_vin";
};
channel@5 {
gw,mode = <1>;
reg = <0x05>;
label = "vdd_3p3";
};
channel@8 {
gw,mode = <1>;
reg = <0x08>;
label = "vdd_bat";
};
channel@b {
gw,mode = <1>;
reg = <0x0b>;
label = "vdd_5p0";
};
channel@e {
gw,mode = <1>;
reg = <0xe>;
label = "vdd_arm";
};
channel@11 {
gw,mode = <1>;
reg = <0x11>;
label = "vdd_soc";
};
channel@14 {
gw,mode = <1>;
reg = <0x14>;
label = "vdd_3p0";
};
channel@17 {
gw,mode = <1>;
reg = <0x17>;
label = "vdd_1p5";
};
channel@1d {
gw,mode = <1>;
reg = <0x1d>;
label = "vdd_1p8";
};
channel@20 {
gw,mode = <1>;
reg = <0x20>;
label = "vdd_1p0";
};
channel@23 {
gw,mode = <1>;
reg = <0x23>;
label = "vdd_2p5";
};
};
fan-controller@a {
compatible = "gw,gsc-fan";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0a>;
};
};
gsc_gpio: gpio@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gsc>;
interrupts = <4>;
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
rtc@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
accel@19 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_accel>;
compatible = "st,lis2de12";
reg = <0x19>;
st,drdy-int-pin = <1>;
interrupt-parent = <&gpio7>;
interrupts = <13 0>;
interrupt-names = "INT1";
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
status = "disabled";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
status = "disabled";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
status = "disabled";
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
status = "disabled";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
dr_mode = "host";
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
no-1-8-v; /* firmware will remove if board revision supports */
status = "okay";
};
&wdog1 {
status = "disabled";
};
&wdog2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl_accel: accelmuxgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>;
};
pinctrl_ecspi2: escpi2grp {
fsl,pins = <
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
>;
};
};
Reference in a new issue View git blame Copy permalink