Rick Chen 48cbf62460 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register ... ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE to boot from ram which allow the board to override the fdt address originally. But after this patch riscv: save hart ID and device tree passed by prior boot stage It provide prior_stage_fdt_address which offer a temporary memory address to keep the dtb address passing from loader(gdb) to u-boot with a1. So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and can be removed. And it also somehow may corrupted BBL if it was be arranged in CONFIG_SYS_SDRAM_BASE. In board_fdt_blob_setup() When boting from ram: prior_stage_fdt_address will be use to reserved dtb temporarily. When booting from ROM: dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base. Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM) which is provided by HW. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>		2018-12-05 14:14:16 +08:00
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ax25	riscv: cache: Implement i/dcache [status, enable, disable]	2018-11-26 13:58:01 +08:00
qemu	riscv: cache: Implement i/dcache [status, enable, disable]	2018-11-26 13:58:01 +08:00
cpu.c	riscv: save hart ID and device tree passed by prior boot stage	2018-11-26 13:57:32 +08:00
Makefile	riscv: Make start.S available for all targets	2018-10-03 17:48:14 +08:00
start.S	riscv: ax25-ae350: Pass dtb address to u-boot with a1 register	2018-12-05 14:14:16 +08:00
u-boot.lds	riscv: Make start.S available for all targets	2018-10-03 17:48:14 +08:00