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https://github.com/AsahiLinux/u-boot
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i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6 chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled. There is on specific switch for on/off L2 Cache, so default select SYS_L2CACHE_OFF. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
57 lines
595 B
Text
57 lines
595 B
Text
if ARCH_MX6
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config MX6
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bool
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default y
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config MX6D
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bool
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config MX6DL
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bool
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config MX6Q
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bool
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config MX6QDL
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bool
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config MX6S
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bool
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config MX6SL
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bool
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config MX6SX
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bool
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config MX6UL
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select SYS_L2CACHE_OFF
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bool
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choice
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prompt "MX6 board select"
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optional
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config TARGET_CM_FX6
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bool "Support CM-FX6"
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select SUPPORT_SPL
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select DM
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select DM_SERIAL
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select DM_GPIO
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config TARGET_SECOMX6
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bool "Support secomx6 boards"
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config TARGET_TQMA6
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bool "TQ Systems TQMa6 board"
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endchoice
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config SYS_SOC
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default "mx6"
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source "board/seco/Kconfig"
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source "board/tqc/tqma6/Kconfig"
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endif
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