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On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware may either be loaded directly from an EEPROM or, if not present, by the SoC's VideCore (the SoC's co-processor). Introduce the function that informs VideCore that VL805 may need its firmware loaded. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
199 lines
5.8 KiB
C
199 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2012 Stephen Warren
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*/
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#include <common.h>
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#include <memalign.h>
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#include <phys2bus.h>
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#include <asm/arch/mbox.h>
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#include <linux/delay.h>
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struct msg_set_power_state {
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struct bcm2835_mbox_hdr hdr;
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struct bcm2835_mbox_tag_set_power_state set_power_state;
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u32 end_tag;
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};
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struct msg_get_clock_rate {
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struct bcm2835_mbox_hdr hdr;
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struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
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u32 end_tag;
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};
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struct msg_query {
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struct bcm2835_mbox_hdr hdr;
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struct bcm2835_mbox_tag_physical_w_h physical_w_h;
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u32 end_tag;
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};
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struct msg_setup {
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struct bcm2835_mbox_hdr hdr;
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struct bcm2835_mbox_tag_physical_w_h physical_w_h;
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struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
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struct bcm2835_mbox_tag_depth depth;
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struct bcm2835_mbox_tag_pixel_order pixel_order;
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struct bcm2835_mbox_tag_alpha_mode alpha_mode;
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struct bcm2835_mbox_tag_virtual_offset virtual_offset;
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struct bcm2835_mbox_tag_overscan overscan;
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struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
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struct bcm2835_mbox_tag_pitch pitch;
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u32 end_tag;
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};
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struct msg_notify_vl805_reset {
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struct bcm2835_mbox_hdr hdr;
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struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
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u32 end_tag;
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};
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int bcm2835_power_on_module(u32 module)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
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int ret;
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BCM2835_MBOX_INIT_HDR(msg_pwr);
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BCM2835_MBOX_INIT_TAG(&msg_pwr->set_power_state,
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SET_POWER_STATE);
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msg_pwr->set_power_state.body.req.device_id = module;
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msg_pwr->set_power_state.body.req.state =
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BCM2835_MBOX_SET_POWER_STATE_REQ_ON |
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BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT;
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ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
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&msg_pwr->hdr);
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if (ret) {
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printf("bcm2835: Could not set module %u power state\n",
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module);
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return -EIO;
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}
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return 0;
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}
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int bcm2835_get_mmc_clock(u32 clock_id)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
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int ret;
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ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
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if (ret)
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return ret;
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BCM2835_MBOX_INIT_HDR(msg_clk);
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BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
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msg_clk->get_clock_rate.body.req.clock_id = clock_id;
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ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
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if (ret) {
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printf("bcm2835: Could not query eMMC clock rate\n");
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return -EIO;
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}
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return msg_clk->get_clock_rate.body.resp.rate_hz;
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}
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int bcm2835_get_video_size(int *widthp, int *heightp)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
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int ret;
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BCM2835_MBOX_INIT_HDR(msg_query);
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BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
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GET_PHYSICAL_W_H);
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ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
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if (ret) {
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printf("bcm2835: Could not query display resolution\n");
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return ret;
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}
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*widthp = msg_query->physical_w_h.body.resp.width;
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*heightp = msg_query->physical_w_h.body.resp.height;
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return 0;
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}
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int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
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int pixel_order, int alpha_mode, ulong *fb_basep,
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ulong *fb_sizep, int *pitchp)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_setup, msg_setup, 1);
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int ret;
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BCM2835_MBOX_INIT_HDR(msg_setup);
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BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
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msg_setup->physical_w_h.body.req.width = *widthp;
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msg_setup->physical_w_h.body.req.height = *heightp;
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BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
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msg_setup->virtual_w_h.body.req.width = *widthp;
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msg_setup->virtual_w_h.body.req.height = *heightp;
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BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
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msg_setup->depth.body.req.bpp = 32;
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BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
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msg_setup->pixel_order.body.req.order = pixel_order;
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BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
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msg_setup->alpha_mode.body.req.alpha = alpha_mode;
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BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
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msg_setup->virtual_offset.body.req.x = 0;
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msg_setup->virtual_offset.body.req.y = 0;
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BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
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msg_setup->overscan.body.req.top = 0;
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msg_setup->overscan.body.req.bottom = 0;
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msg_setup->overscan.body.req.left = 0;
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msg_setup->overscan.body.req.right = 0;
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BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
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msg_setup->allocate_buffer.body.req.alignment = 0x100;
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BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_setup->pitch, GET_PITCH);
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ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
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if (ret) {
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printf("bcm2835: Could not configure display\n");
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return ret;
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}
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*widthp = msg_setup->physical_w_h.body.resp.width;
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*heightp = msg_setup->physical_w_h.body.resp.height;
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*pitchp = msg_setup->pitch.body.resp.pitch;
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*fb_basep = bus_to_phys(
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msg_setup->allocate_buffer.body.resp.fb_address);
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*fb_sizep = msg_setup->allocate_buffer.body.resp.fb_size;
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return 0;
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}
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/*
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* On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
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* may either be loaded directly from an EEPROM or, if not present, by the
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* SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
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* loaded.
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*/
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int bcm2711_notify_vl805_reset(void)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
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msg_notify_vl805_reset, 1);
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int ret;
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BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
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BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
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NOTIFY_XHCI_RESET);
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/*
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* The pci device address is expected like this:
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*
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* PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
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*
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* But since RPi4's PCIe setup is hardwired, we know the address in
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* advance.
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*/
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msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
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ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
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&msg_notify_vl805_reset->hdr);
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if (ret) {
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printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
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return -EIO;
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}
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udelay(200);
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return 0;
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}
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