u-boot/arch/arm/include/asm/arch-rockchip/periph.h
Philipp Tomsich 476f7090bf rockchip: pinctrl: rk3399: add GMAC (RGMII only) support
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration.  This commit
adds the pinctrl support for GMAC in RGMII signalling mode:
 * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
 * adds the required defines (in the GRF support) for configuring the
   GPIOC pins for RGMII
 * configures the RGMII pins (in GPIOC) when requested via pinctrl

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:01:57 -06:00

55 lines
1.1 KiB
C

/*
* (C) Copyright 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef _ASM_ARCH_PERIPH_H
#define _ASM_ARCH_PERIPH_H
/*
* The peripherals supported by the hardware. This is used to specify clocks
* and pinctrl settings. Some SoCs will not support all of these, but it
* provides a common reference for common drivers to use.
*/
enum periph_id {
PERIPH_ID_PWM0,
PERIPH_ID_PWM1,
PERIPH_ID_PWM2,
PERIPH_ID_PWM3,
PERIPH_ID_PWM4,
PERIPH_ID_I2C0,
PERIPH_ID_I2C1,
PERIPH_ID_I2C2,
PERIPH_ID_I2C3,
PERIPH_ID_I2C4,
PERIPH_ID_I2C5,
PERIPH_ID_SPI0,
PERIPH_ID_SPI1,
PERIPH_ID_SPI2,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
PERIPH_ID_UART4,
PERIPH_ID_LCDC0,
PERIPH_ID_LCDC1,
PERIPH_ID_SDMMC0,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_HDMI,
PERIPH_ID_GMAC,
PERIPH_ID_COUNT,
/* Some aliases */
PERIPH_ID_EMMC = PERIPH_ID_SDMMC0,
PERIPH_ID_SDCARD = PERIPH_ID_SDMMC1,
PERIPH_ID_UART_BT = PERIPH_ID_UART0,
PERIPH_ID_UART_BB = PERIPH_ID_UART1,
PERIPH_ID_UART_DBG = PERIPH_ID_UART2,
PERIPH_ID_UART_GPS = PERIPH_ID_UART3,
PERIPH_ID_UART_EXP = PERIPH_ID_UART4,
};
#endif