mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
69e16c7b1c
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong. This device is similar to the NanoPi R2S, and has a 16MB SPI NOR (mx25l12805d). The reset button is changed to directly reset the power supply, another detail is that both network ports have independent MAC addresses. The device tree and description are taken from kernel v6.3-rc1. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tianling Shen <cnsztl@gmail.com>
114 lines
2.9 KiB
Text
114 lines
2.9 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_COUNTER_FREQUENCY=24000000
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_TEXT_BASE=0x00200000
|
|
CONFIG_SPL_GPIO=y
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_ROCKCHIP_RK3328=y
|
|
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
|
|
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
CONFIG_SPL_STACK=0x400000
|
|
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
|
|
CONFIG_DEBUG_UART_BASE=0xFF130000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SYS_LOAD_ADDR=0x800800
|
|
CONFIG_DEBUG_UART=y
|
|
# CONFIG_ANDROID_BOOT_IMAGE is not set
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_MISC_INIT_R=y
|
|
CONFIG_SPL_MAX_SIZE=0x40000
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_BSS_START_ADDR=0x2000000
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_I2C=y
|
|
CONFIG_SPL_POWER=y
|
|
CONFIG_SPL_ATF=y
|
|
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_TPL_OF_CONTROL=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_TPL_OF_PLATDATA=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_SYS_MMC_ENV_DEV=1
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
|
CONFIG_TPL_DM=y
|
|
CONFIG_REGMAP=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_TPL_REGMAP=y
|
|
CONFIG_SYSCON=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_TPL_SYSCON=y
|
|
CONFIG_CLK=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
|
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
CONFIG_SPI_FLASH_GIGADEVICE=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_SPL_PMIC_RK8XX=y
|
|
CONFIG_SPL_DM_REGULATOR=y
|
|
CONFIG_REGULATOR_PWM=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_SPL_DM_REGULATOR_FIXED=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_TPL_RAM=y
|
|
CONFIG_BAUDRATE=1500000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550_MEM32=y
|
|
CONFIG_ROCKCHIP_SPI=y
|
|
CONFIG_SYSINFO=y
|
|
CONFIG_SYSRESET=y
|
|
# CONFIG_TPL_SYSRESET is not set
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_USB_OHCI_HCD=y
|
|
CONFIG_USB_OHCI_GENERIC=y
|
|
CONFIG_USB_DWC2=y
|
|
CONFIG_USB_DWC3=y
|
|
# CONFIG_USB_DWC3_GADGET is not set
|
|
CONFIG_USB_GADGET=y
|
|
CONFIG_USB_GADGET_DWC2_OTG=y
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
CONFIG_TPL_TINY_MEMSET=y
|
|
CONFIG_ERRNO_STR=y
|