u-boot/arch/arm/mach-socfpga
Tom Rini 4de720e98d Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.

The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
2022-04-05 08:33:32 -04:00
..
include/mach arm: socfpga: arria10: Enable double peripheral RBF configuration 2021-12-17 12:58:01 +08:00
board.c
clock_manager.c
clock_manager_agilex.c
clock_manager_arria10.c
clock_manager_gen5.c
clock_manager_n5x.c arm: socfpga: Add clock manager for Intel N5X device 2021-08-25 13:32:50 +08:00
clock_manager_s10.c
firewall.c
fpga_manager.c
freeze_controller.c
Kconfig keymile: Move sourcing of common Kconfig 2022-04-01 10:28:46 -04:00
lowlevel_init_soc64.S armv8: Fix and simplify branch_if_master/branch_if_slave 2022-03-02 13:59:29 -05:00
mailbox_s10.c
Makefile arm: socfpga: Enable Intel N5X device build 2021-08-25 15:26:38 +08:00
misc.c arm: socfpga: Get clock manager base address for Intel N5X device 2021-08-25 12:54:37 +08:00
misc_arria10.c arm: socfpga: arria10: Enable double peripheral RBF configuration 2021-12-17 12:58:01 +08:00
misc_gen5.c
misc_soc64.c arm: socfpga: Changed misc_s10.c to misc_soc64.c 2021-08-25 13:37:01 +08:00
mmu-arm64_s10.c
pinmux_arria10.c
qts-filter-a10.sh
qts-filter.sh
reset_manager_arria10.c
reset_manager_gen5.c
reset_manager_s10.c
scan_manager.c
secure_reg_helper.c
secure_vab.c
smc_api.c
spl_a10.c spl: mmc: extend spl_mmc_boot_mode() to take mmc argument 2022-04-04 23:24:17 +01:00
spl_agilex.c
spl_gen5.c spl: mmc: extend spl_mmc_boot_mode() to take mmc argument 2022-04-04 23:24:17 +01:00
spl_n5x.c arm: socfpga: Add SPL for Intel N5X device 2021-08-25 14:43:29 +08:00
spl_s10.c
spl_soc64.c mmc: Rename MMC_SUPPORT to MMC 2021-09-04 11:42:41 -04:00
system_manager_gen5.c
system_manager_soc64.c
timer.c
timer_s10.c
vab.c
wrap_handoff_soc64.c
wrap_iocsr_config.c
wrap_pinmux_config.c
wrap_pll_config.c
wrap_pll_config_soc64.c
wrap_sdram_config.c