mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-30 06:53:09 +00:00
a20be24cd4
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC driver itself, remove the hard-coded variant from board code and let the PMIC driver perform this task using one-liner: ``` $ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/) ``` Venice and i.MX93 EVK required slight manual fix up. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
126 lines
2.3 KiB
C
126 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2022 NXP
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <command.h>
|
|
#include <cpu_func.h>
|
|
#include <hang.h>
|
|
#include <image.h>
|
|
#include <init.h>
|
|
#include <log.h>
|
|
#include <spl.h>
|
|
#include <asm/global_data.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/imx93_pins.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/sys_proto.h>
|
|
#include <asm/mach-imx/boot_mode.h>
|
|
#include <asm/mach-imx/mxc_i2c.h>
|
|
#include <asm/arch-mx7ulp/gpio.h>
|
|
#include <asm/mach-imx/syscounter.h>
|
|
#include <asm/mach-imx/s400_api.h>
|
|
#include <dm/uclass.h>
|
|
#include <dm/device.h>
|
|
#include <dm/uclass-internal.h>
|
|
#include <dm/device-internal.h>
|
|
#include <linux/delay.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/ccm_regs.h>
|
|
#include <asm/arch/ddr.h>
|
|
#include <power/pmic.h>
|
|
#include <power/pca9450.h>
|
|
#include <asm/arch/trdc.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
int spl_board_boot_device(enum boot_device boot_dev_spl)
|
|
{
|
|
return BOOT_DEVICE_BOOTROM;
|
|
}
|
|
|
|
void spl_board_init(void)
|
|
{
|
|
puts("Normal Boot\n");
|
|
}
|
|
|
|
void spl_dram_init(void)
|
|
{
|
|
ddr_init(&dram_timing);
|
|
}
|
|
|
|
#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
|
|
int power_init_board(void)
|
|
{
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
ret = pmic_get("pmic@25", &dev);
|
|
if (ret == -ENODEV) {
|
|
puts("No pca9450@25\n");
|
|
return 0;
|
|
}
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
/* BUCKxOUT_DVS0/1 control BUCK123 output */
|
|
pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
|
|
|
|
/* 0.9v
|
|
*/
|
|
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
|
|
pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
|
|
|
|
/* I2C_LT_EN*/
|
|
pmic_reg_write(dev, 0xa, 0x3);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
extern int imx9_probe_mu(void *ctx, struct event *event);
|
|
void board_init_f(ulong dummy)
|
|
{
|
|
int ret;
|
|
|
|
/* Clear the BSS. */
|
|
memset(__bss_start, 0, __bss_end - __bss_start);
|
|
|
|
timer_init();
|
|
|
|
arch_cpu_init();
|
|
|
|
board_early_init_f();
|
|
|
|
spl_early_init();
|
|
|
|
preloader_console_init();
|
|
|
|
ret = imx9_probe_mu(NULL, NULL);
|
|
if (ret) {
|
|
printf("Fail to init Sentinel API\n");
|
|
} else {
|
|
printf("SOC: 0x%x\n", gd->arch.soc_rev);
|
|
printf("LC: 0x%x\n", gd->arch.lifecycle);
|
|
}
|
|
power_init_board();
|
|
|
|
/* 1.7GHz */
|
|
set_arm_clk(1700000000);
|
|
|
|
/* Init power of mix */
|
|
soc_power_init();
|
|
|
|
/* Setup TRDC for DDR access */
|
|
trdc_init();
|
|
|
|
/* DDR initialization */
|
|
spl_dram_init();
|
|
|
|
/* Put M33 into CPUWAIT for following kick */
|
|
ret = m33_prepare();
|
|
if (!ret)
|
|
printf("M33 prepare ok\n");
|
|
|
|
board_init_r(NULL, 0);
|
|
}
|