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65530a842e
Common practice on Tegra 2 boards is to use the pllp_out4 FO to generate the ULPI reference clock. For this to work we have to override the default hardware generated output divider. This function adds a clean way to do so. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
196 lines
3.9 KiB
C
196 lines
3.9 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* Copyright (c) 2010-2012 NVIDIA Corporation <www.nvidia.com>
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Tegra20 clock PLL tables */
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#ifndef _CLOCK_TABLES_H_
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#define _CLOCK_TABLES_H_
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/* The PLLs supported by the hardware */
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enum clock_id {
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CLOCK_ID_FIRST,
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CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,
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CLOCK_ID_MEMORY,
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CLOCK_ID_PERIPH,
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CLOCK_ID_AUDIO,
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CLOCK_ID_USB,
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CLOCK_ID_DISPLAY,
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/* now the simple ones */
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CLOCK_ID_FIRST_SIMPLE,
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CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,
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CLOCK_ID_EPCI,
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CLOCK_ID_SFROM32KHZ,
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/* These are the base clocks (inputs to the Tegra SOC) */
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CLOCK_ID_32KHZ,
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CLOCK_ID_OSC,
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CLOCK_ID_COUNT, /* number of clocks */
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CLOCK_ID_NONE = -1,
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};
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/* The clocks supported by the hardware */
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enum periph_id {
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PERIPH_ID_FIRST,
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/* Low word: 31:0 */
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PERIPH_ID_CPU = PERIPH_ID_FIRST,
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PERIPH_ID_RESERVED1,
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PERIPH_ID_RESERVED2,
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PERIPH_ID_AC97,
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PERIPH_ID_RTC,
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PERIPH_ID_TMR,
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PERIPH_ID_UART1,
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PERIPH_ID_UART2,
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/* 8 */
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PERIPH_ID_GPIO,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SPDIF,
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PERIPH_ID_I2S1,
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PERIPH_ID_I2C1,
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PERIPH_ID_NDFLASH,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC4,
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/* 16 */
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PERIPH_ID_TWC,
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PERIPH_ID_PWM,
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PERIPH_ID_I2S2,
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PERIPH_ID_EPP,
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PERIPH_ID_VI,
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PERIPH_ID_2D,
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PERIPH_ID_USBD,
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PERIPH_ID_ISP,
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/* 24 */
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PERIPH_ID_3D,
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PERIPH_ID_IDE,
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PERIPH_ID_DISP2,
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PERIPH_ID_DISP1,
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PERIPH_ID_HOST1X,
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PERIPH_ID_VCP,
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PERIPH_ID_RESERVED30,
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PERIPH_ID_CACHE2,
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/* Middle word: 63:32 */
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PERIPH_ID_MEM,
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PERIPH_ID_AHBDMA,
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PERIPH_ID_APBDMA,
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PERIPH_ID_RESERVED35,
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PERIPH_ID_KBC,
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PERIPH_ID_STAT_MON,
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PERIPH_ID_PMC,
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PERIPH_ID_FUSE,
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/* 40 */
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PERIPH_ID_KFUSE,
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PERIPH_ID_SBC1,
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PERIPH_ID_SNOR,
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PERIPH_ID_SPI1,
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PERIPH_ID_SBC2,
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PERIPH_ID_XIO,
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PERIPH_ID_SBC3,
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PERIPH_ID_DVC_I2C,
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/* 48 */
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PERIPH_ID_DSI,
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PERIPH_ID_TVO,
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PERIPH_ID_MIPI,
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PERIPH_ID_HDMI,
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PERIPH_ID_CSI,
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PERIPH_ID_TVDAC,
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PERIPH_ID_I2C2,
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PERIPH_ID_UART3,
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/* 56 */
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PERIPH_ID_RESERVED56,
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PERIPH_ID_EMC,
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PERIPH_ID_USB2,
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PERIPH_ID_USB3,
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PERIPH_ID_MPE,
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PERIPH_ID_VDE,
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PERIPH_ID_BSEA,
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PERIPH_ID_BSEV,
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/* Upper word 95:64 */
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PERIPH_ID_SPEEDO,
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PERIPH_ID_UART4,
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PERIPH_ID_UART5,
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PERIPH_ID_I2C3,
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PERIPH_ID_SBC4,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_PCIE,
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PERIPH_ID_OWR,
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/* 72 */
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PERIPH_ID_AFI,
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PERIPH_ID_CORESIGHT,
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PERIPH_ID_RESERVED74,
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PERIPH_ID_AVPUCQ,
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PERIPH_ID_RESERVED76,
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PERIPH_ID_RESERVED77,
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PERIPH_ID_RESERVED78,
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PERIPH_ID_RESERVED79,
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/* 80 */
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PERIPH_ID_RESERVED80,
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PERIPH_ID_RESERVED81,
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PERIPH_ID_RESERVED82,
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PERIPH_ID_RESERVED83,
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PERIPH_ID_IRAMA,
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PERIPH_ID_IRAMB,
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PERIPH_ID_IRAMC,
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PERIPH_ID_IRAMD,
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/* 88 */
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PERIPH_ID_CRAM2,
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PERIPH_ID_SYNC_CLK_DOUBLER,
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PERIPH_ID_CLK_M_DOUBLER,
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PERIPH_ID_RESERVED91,
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PERIPH_ID_SUS_OUT,
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PERIPH_ID_DEV2_OUT,
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PERIPH_ID_DEV1_OUT,
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PERIPH_ID_COUNT,
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PERIPH_ID_NONE = -1,
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};
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enum pll_out_id {
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PLL_OUT1,
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PLL_OUT2,
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PLL_OUT3,
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PLL_OUT4
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};
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/* Converts a clock number to a clock register: 0=L, 1=H, 2=U */
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#define PERIPH_REG(id) ((id) >> 5)
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/* Mask value for a clock (within PERIPH_REG(id)) */
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#define PERIPH_MASK(id) (1 << ((id) & 0x1f))
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/* return 1 if a PLL ID is in range, and not a simple PLL */
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#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \
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(id) < CLOCK_ID_FIRST_SIMPLE)
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#endif /* _CLOCK_TABLES_H_ */
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