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2d02586028
Use dt-bindings for GSC hwmon devices. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
425 lines
10 KiB
C
425 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2013 Gateworks Corporation
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*
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* Author: Tim Harvey <tharvey@gateworks.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <log.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <common.h>
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#include <i2c.h>
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#include <linux/ctype.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include "ventana_eeprom.h"
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#include "gsc.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* The Gateworks System Controller will fail to ACK a master transaction if
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* it is busy, which can occur during its 1HZ timer tick while reading ADC's.
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* When this does occur, it will never be busy long enough to fail more than
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* 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with
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* 3 retries.
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*/
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int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int retry = 3;
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int n = 0;
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int ret;
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while (n++ < retry) {
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ret = i2c_read(chip, addr, alen, buf, len);
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if (!ret)
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break;
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debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
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n, ret);
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if (ret != -ENODEV)
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break;
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mdelay(10);
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}
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return ret;
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}
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int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int retry = 3;
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int n = 0;
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int ret;
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while (n++ < retry) {
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ret = i2c_write(chip, addr, alen, buf, len);
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if (!ret)
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break;
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debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
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n, ret);
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if (ret != -ENODEV)
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break;
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mdelay(10);
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}
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mdelay(100);
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return ret;
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}
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int gsc_get_board_temp(void)
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{
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const void *fdt = gd->fdt_blob;
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int node, reg, mode, val;
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const char *label;
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u8 buf[2];
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int ret;
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node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
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if (node <= 0)
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return node;
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i2c_set_bus_num(0);
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/* iterate over hwmon nodes */
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node = fdt_first_subnode(fdt, node);
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while (node > 0) {
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reg = fdtdec_get_int(fdt, node, "reg", -1);
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mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
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label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
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if ((reg == -1) || (mode == -1) || !label) {
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printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
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continue;
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}
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if ((mode != 0) || strcmp(label, "temp"))
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continue;
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memset(buf, 0, sizeof(buf));
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ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf));
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val = buf[0] | buf[1] << 8;
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if (val >= 0) {
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if (val > 0x8000)
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val -= 0xffff;
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return val;
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}
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node = fdt_next_subnode(fdt, node);
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}
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return 0;
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}
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/* display hardware monitor ADC channels */
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int gsc_hwmon(void)
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{
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const void *fdt = gd->fdt_blob;
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int node, reg, mode, len, val, offset;
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const char *label;
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u8 buf[2];
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int ret;
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node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
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if (node <= 0)
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return node;
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i2c_set_bus_num(0);
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/* iterate over hwmon nodes */
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node = fdt_first_subnode(fdt, node);
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while (node > 0) {
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reg = fdtdec_get_int(fdt, node, "reg", -1);
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mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
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offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
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label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
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if ((reg == -1) || (mode == -1) || !label)
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printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
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memset(buf, 0, sizeof(buf));
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ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf));
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val = buf[0] | buf[1] << 8;
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if (val >= 0) {
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const u32 *div;
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int r[2];
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switch (mode) {
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case 0: /* temperature (C*10) */
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if (val > 0x8000)
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val -= 0xffff;
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printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
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break;
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case 1: /* prescaled voltage */
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if (val != 0xffff)
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printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
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break;
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case 2: /* scaled based on ref volt and resolution */
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val *= 2500;
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val /= 1 << 12;
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/* apply pre-scaler voltage divider */
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div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
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if (div && (len == sizeof(uint32_t) * 2)) {
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r[0] = fdt32_to_cpu(div[0]);
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r[1] = fdt32_to_cpu(div[1]);
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if (r[0] && r[1]) {
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val *= (r[0] + r[1]);
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val /= r[1];
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}
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}
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/* adjust by offset */
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val += (offset / 1000);
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printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
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break;
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}
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}
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node = fdt_next_subnode(fdt, node);
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}
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return 0;
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}
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int gsc_info(int verbose)
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{
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unsigned char buf[16];
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i2c_set_bus_num(0);
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if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
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return CMD_RET_FAILURE;
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printf("GSC: v%d", buf[GSC_SC_FWVER]);
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printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
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printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
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? "en" : "dis");
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if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
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buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
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puts(" WDT_RESET");
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gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
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&buf[GSC_SC_STATUS], 1);
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}
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printf(" board temp at %dC", gsc_get_board_temp() / 10);
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puts("\n");
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if (!verbose)
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return CMD_RET_SUCCESS;
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gsc_hwmon();
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return 0;
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}
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/*
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* The Gateworks System Controller implements a boot
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* watchdog (always enabled) as a workaround for IMX6 boot related
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* errata such as:
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* ERR005768 - no fix scheduled
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* ERR006282 - fixed in silicon r1.2
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* ERR007117 - fixed in silicon r1.3
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* ERR007220 - fixed in silicon r1.3
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* ERR007926 - no fix scheduled
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* see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
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*
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* Disable the boot watchdog
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*/
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int gsc_boot_wd_disable(void)
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{
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u8 reg;
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i2c_set_bus_num(CONFIG_I2C_GSC);
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if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) {
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reg |= (1 << GSC_SC_CTRL1_WDDIS);
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if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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return 0;
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}
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puts("Error: could not disable GSC Watchdog\n");
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return 1;
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}
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/* determine BOM revision from model */
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int get_bom_rev(const char *str)
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{
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int rev_bom = 0;
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int i;
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for (i = strlen(str) - 1; i > 0; i--) {
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if (str[i] == '-')
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break;
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if (str[i] >= '1' && str[i] <= '9') {
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rev_bom = str[i] - '0';
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break;
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}
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}
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return rev_bom;
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}
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/* determine PCB revision from model */
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char get_pcb_rev(const char *str)
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{
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char rev_pcb = 'A';
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int i;
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for (i = strlen(str) - 1; i > 0; i--) {
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if (str[i] == '-')
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break;
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if (str[i] >= 'A') {
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rev_pcb = str[i];
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break;
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}
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}
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return rev_pcb;
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}
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/*
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* get dt name based on model and detail level:
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*/
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const char *gsc_get_dtb_name(int level, char *buf, int sz)
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{
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const char *model = (const char *)ventana_info.model;
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const char *pre = is_mx6dq() ? "imx6q-" : "imx6dl-";
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int modelno, rev_pcb, rev_bom;
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/* a few board models are dt equivalents to other models */
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if (strncasecmp(model, "gw5906", 6) == 0)
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model = "gw552x-d";
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else if (strncasecmp(model, "gw5908", 6) == 0)
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model = "gw53xx-f";
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else if (strncasecmp(model, "gw5905", 6) == 0)
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model = "gw5904-a";
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modelno = ((model[2] - '0') * 1000)
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+ ((model[3] - '0') * 100)
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+ ((model[4] - '0') * 10)
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+ (model[5] - '0');
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rev_pcb = tolower(get_pcb_rev(model));
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rev_bom = get_bom_rev(model);
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/* compare model/rev/bom in order of most specific to least */
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snprintf(buf, sz, "%s%04d", pre, modelno);
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switch (level) {
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case 0: /* full model first (ie gw5400-a1) */
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if (rev_bom) {
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snprintf(buf, sz, "%sgw%04d-%c%d", pre, modelno, rev_pcb, rev_bom);
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break;
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}
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fallthrough;
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case 1: /* don't care about bom rev (ie gw5400-a) */
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snprintf(buf, sz, "%sgw%04d-%c", pre, modelno, rev_pcb);
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break;
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case 2: /* don't care about the pcb rev (ie gw5400) */
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snprintf(buf, sz, "%sgw%04d", pre, modelno);
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break;
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case 3: /* look for generic model (ie gw540x) */
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snprintf(buf, sz, "%sgw%03dx", pre, modelno / 10);
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break;
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case 4: /* look for more generic model (ie gw54xx) */
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snprintf(buf, sz, "%sgw%02dxx", pre, modelno / 100);
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break;
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default: /* give up */
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return NULL;
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}
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return buf;
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}
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#if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD)
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static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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unsigned char reg;
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unsigned long secs = 0;
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if (argc < 2)
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return CMD_RET_USAGE;
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secs = dectoul(argv[1], NULL);
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printf("GSC Sleeping for %ld seconds\n", secs);
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i2c_set_bus_num(0);
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reg = (secs >> 24) & 0xff;
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if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, ®, 1))
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goto error;
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reg = (secs >> 16) & 0xff;
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if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, ®, 1))
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goto error;
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reg = (secs >> 8) & 0xff;
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if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, ®, 1))
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goto error;
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reg = secs & 0xff;
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if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, ®, 1))
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goto error;
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if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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goto error;
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reg |= (1 << 2);
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if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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goto error;
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reg &= ~(1 << 2);
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reg |= 0x3;
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if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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goto error;
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return CMD_RET_SUCCESS;
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error:
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printf("i2c error\n");
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return CMD_RET_FAILURE;
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}
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static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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unsigned char reg;
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if (argc < 2)
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return CMD_RET_USAGE;
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if (strcasecmp(argv[1], "enable") == 0) {
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int timeout = 0;
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if (argc > 2)
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timeout = dectoul(argv[2], NULL);
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i2c_set_bus_num(0);
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if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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return CMD_RET_FAILURE;
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reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
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if (timeout == 60)
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reg |= (1 << GSC_SC_CTRL1_WDTIME);
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else
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timeout = 30;
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reg |= (1 << GSC_SC_CTRL1_WDEN);
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if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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return CMD_RET_FAILURE;
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printf("GSC Watchdog enabled with timeout=%d seconds\n",
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timeout);
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} else if (strcasecmp(argv[1], "disable") == 0) {
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i2c_set_bus_num(0);
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if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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return CMD_RET_FAILURE;
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reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
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if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1))
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return CMD_RET_FAILURE;
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printf("GSC Watchdog disabled\n");
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} else {
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return CMD_RET_USAGE;
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}
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return CMD_RET_SUCCESS;
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}
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static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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{
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if (argc < 2)
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return gsc_info(1);
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if (strcasecmp(argv[1], "wd") == 0)
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return do_gsc_wd(cmdtp, flag, --argc, ++argv);
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else if (strcasecmp(argv[1], "sleep") == 0)
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return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
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return CMD_RET_USAGE;
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}
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U_BOOT_CMD(
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gsc, 4, 1, do_gsc, "GSC configuration",
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"[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
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);
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#endif /* CONFIG_CMD_GSC */
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