mirror of
https://github.com/AsahiLinux/u-boot
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b0c55207bf
Nodes without reg properties shouldn't be placed in amba node. Move them out. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
172 lines
2.4 KiB
Text
172 lines
2.4 KiB
Text
/*
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* clock specification for Xilinx ZynqMP ep108 development board
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*
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* (C) Copyright 2015, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/ {
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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u-boot,dm-pre-reloc;
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};
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <111111111>;
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};
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sata_clk: sata_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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dp_aclk: clock0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-accuracy = <100>;
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};
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clk100: clk100 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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clk600: clk600 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <600000000>;
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};
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dp_aud_clk: clock1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <22579200>;
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clock-accuracy = <100>;
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};
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};
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&can0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&can1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&fpd_dma_chan1 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan2 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan3 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan4 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan5 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan6 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan7 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan8 {
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clocks = <&clk600>, <&clk100>;
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};
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&gem0 {
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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};
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&gpio {
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clocks = <&misc_clk>;
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};
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&i2c0 {
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clocks = <&i2c_clk>;
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};
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&i2c1 {
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clocks = <&i2c_clk>;
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};
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&nand0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&qspi {
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clocks = <&misc_clk &misc_clk>;
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};
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&sata {
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clocks = <&sata_clk>;
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};
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&sdhci0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&sdhci1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&spi0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&spi1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&uart0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&usb0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&usb1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&watchdog0 {
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clocks= <&misc_clk>;
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};
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&xilinx_drm {
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clocks = <&misc_clk>;
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};
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&xlnx_dp {
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clocks = <&dp_aclk>, <&dp_aud_clk>;
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};
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&xlnx_dp_snd_codec0 {
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clocks = <&dp_aud_clk>;
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};
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&xlnx_dpdma {
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clocks = <&misc_clk>;
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};
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