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ac47fbee6d
SPI controllers SSP1, 2 and 3 require to enable their respective clocks. Let's enable them only when the SPI controller driver is built. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_misc.h>
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int arch_cpu_init(void)
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{
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struct misc_regs *const misc_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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u32 periph1_clken, periph_clk_cfg;
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periph1_clken = readl(&misc_p->periph1_clken);
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#if defined(CONFIG_SPEAR3XX)
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periph1_clken |= MISC_GPT2ENB;
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#elif defined(CONFIG_SPEAR600)
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periph1_clken |= MISC_GPT3ENB;
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#endif
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#if defined(CONFIG_PL011_SERIAL)
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periph1_clken |= MISC_UART0ENB;
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periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
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periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
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periph_clk_cfg |= CONFIG_SPEAR_UART48M;
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writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
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#endif
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#if defined(CONFIG_ETH_DESIGNWARE)
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periph1_clken |= MISC_ETHENB;
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#endif
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#if defined(CONFIG_DW_UDC)
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periph1_clken |= MISC_USBDENB;
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#endif
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#if defined(CONFIG_SYS_I2C_DW)
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periph1_clken |= MISC_I2CENB;
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#endif
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#if defined(CONFIG_ST_SMI)
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periph1_clken |= MISC_SMIENB;
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#endif
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#if defined(CONFIG_NAND_FSMC)
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periph1_clken |= MISC_FSMCENB;
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#endif
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#if defined(CONFIG_USB_EHCI_SPEAR)
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periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
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#endif
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#if defined(CONFIG_SPEAR_GPIO)
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periph1_clken |= MISC_GPIO3ENB | MISC_GPIO4ENB;
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#endif
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#if defined(CONFIG_PL022_SPI)
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periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB;
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#endif
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writel(periph1_clken, &misc_p->periph1_clken);
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return 0;
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}
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#ifdef CONFIG_DISPLAY_CPUINFO
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int print_cpuinfo(void)
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{
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#ifdef CONFIG_SPEAR300
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printf("CPU: SPEAr300\n");
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#elif defined(CONFIG_SPEAR310)
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printf("CPU: SPEAr310\n");
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#elif defined(CONFIG_SPEAR320)
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printf("CPU: SPEAr320\n");
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#elif defined(CONFIG_SPEAR600)
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printf("CPU: SPEAr600\n");
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#else
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#error CPU not supported in spear platform
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#endif
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return 0;
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}
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#endif
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
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static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
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char *const argv[])
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{
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if (argc != 2)
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goto usage;
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if (strncmp(argv[1], "hw", 2) == 0) {
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/* 1-bit HW ECC */
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printf("Switching to 1-bit HW ECC\n");
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fsmc_nand_switch_ecc(1);
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} else if (strncmp(argv[1], "bch4", 2) == 0) {
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/* 4-bit SW ECC BCH4 */
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printf("Switching to 4-bit SW ECC (BCH4)\n");
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fsmc_nand_switch_ecc(4);
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} else {
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goto usage;
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}
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return 0;
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usage:
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printf("Usage: nandecc %s\n", cmdtp->usage);
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return 1;
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}
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U_BOOT_CMD(
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nandecc, 2, 0, do_switch_ecc,
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"switch NAND ECC calculation algorithm",
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"hw|bch4 - Switch between NAND hardware 1-bit HW and"
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" 4-bit SW BCH\n"
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);
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#endif
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