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53430a4f25
Not all padconfs are the same between 4430 and 4460, so instead of working around this with an if, we should have an specific padconf structure for both chips (like handling the differences between the LEDs GPIOs and TPS). Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
83 lines
3.5 KiB
C
83 lines
3.5 KiB
C
/*
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* (C) Copyright 2010
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* Balaji Krishnamoorthy <balajitk@ti.com>
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* Aneesh V <aneesh@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _OMAP4_MUX_DATA_H_
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#define _OMAP4_MUX_DATA_H_
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#include <asm/arch/mux_omap4.h>
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const struct pad_conf_entry core_padconf_array_essential[] = {
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{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */
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{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */
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{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */
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{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */
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{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */
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{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */
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{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */
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{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */
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{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */
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{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */
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{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */
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{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
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{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
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{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */
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{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */
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{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */
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{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */
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{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */
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{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */
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{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */
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{I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */
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{I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */
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{I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */
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{I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */
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{I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */
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{I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */
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{I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */
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{I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */
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{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */
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{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */
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{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */
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{UART3_TX_IRTX, (M0)} /* uart3_tx */
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};
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const struct pad_conf_entry wkup_padconf_array_essential[] = {
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{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
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{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
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{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */
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};
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const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {
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{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7, TPS */
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};
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#endif /* _OMAP4_MUX_DATA_H_ */
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