mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 18:59:44 +00:00
019df879a9
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
74 lines
1 KiB
Text
74 lines
1 KiB
Text
/*
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* Device Tree Source for UniPhier PH1-LD6b Reference Board
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*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/include/ "uniphier-ph1-ld6b.dtsi"
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/include/ "uniphier-ref-daughter.dtsi"
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/ {
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model = "UniPhier PH1-LD6b Reference Board";
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compatible = "socionext,ph1-ld6b-ref", "socionext,ph1-ld6b";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = &serial0;
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};
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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serial2 = &serial2;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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};
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};
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&serial0 {
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status = "okay";
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};
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&serial1 {
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status = "okay";
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};
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&serial2 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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/* for U-boot only */
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/ {
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soc {
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u-boot,dm-pre-reloc;
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};
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};
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&serial0 {
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u-boot,dm-pre-reloc;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&pinctrl_uart0 {
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u-boot,dm-pre-reloc;
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};
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